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Thu, 22 Oct 2026 06:16:55 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c468a1eecbcsm105632466b.7.2026.10.22.06.16.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Oct 2026 06:16:54 -0700 (PDT) Message-ID: Date: Thu, 22 Oct 2026 15:16:46 +0200 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] arm64: dts: qcom: monaco-evk: Describe the PCIe M.2 Key E connector To: Loic Poulain Cc: Manivannan Sadhasivam , Wei Deng , andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-bluetooth@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_chezhou@quicinc.com, cheng.jiang@oss.qualcomm.com, shuai.zhang@oss.qualcomm.com, jinwang.li@oss.qualcomm.com, xiuzhuo.shang@oss.qualcomm.com, mengshi.wu@oss.qualcomm.com References: <0303224f-4c2c-46ec-9866-5ea1fd0fb4a3@oss.qualcomm.com> <20260825092715.5794-1-wei.deng@oss.qualcomm.com> <83b67ab2-ab68-427a-94aa-881454f457ba@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIyMDA1MiBTYWx0ZWRfX+4akeghlIi9Y V1TC4kLGXNZyP4QqZXvlaY6gCqQoY3Lz9LJxypVLyzM62hS2iCYXWU+YxjaxnqWyOkNEBo5zYom mARv/454k7tOiSx3O1vO1IXxbNhtetc= X-Proofpoint-ORIG-GUID: MvDte231QIn5Oygmsfn7Lu8CPeK9dBv- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIyMDA1MiBTYWx0ZWRfX3lZ+nzXZq0wl Oul6vScUyGpTHs/O5ldFv8wjnrxf/cHj8+qDYdQiPxddTnXeVwdA7vxw5kkNKuYRg53gebedqZ0 juszN0xnX2JjPv4hoPf+z1TcV8N8kAB9igxgAt3OrcjCg7wecQ6xeac2jc7+SWPcpxRjUuVqH2a T9W7Nf+8aWqLdEF4KFT2m5O27yU8/CDEtrltHa4mNlvQc/+IRvIGwZLkjWKRQGQzKljH+tFdRJJ aijkLoFWATRAHRTzGXytm6Wi7Cv1W392+70fVvJ384QiuA3WmZrYx2gkydBLn7uXli3DYpB3oBL u35fOXGlTG5FzVrHn3i9FkVb+bfR+QGgyI7i6+KjbOtsjup1Ulc7rNp74KUp8yz0Xv85S0c8N3A EFsJElrVftenD7GXz94aOzLfce8tRBc+5kuXWJSJsPYicOJcnO8jna5ircUN7irz6ypCu1ZjWoj Qp3t+uzyz78zyN2mMbQ== X-Proofpoint-GUID: MvDte231QIn5Oygmsfn7Lu8CPeK9dBv- X-Authority-Analysis: v=2.4 cv=TIPQ2Fla c=1 sm=1 tr=0 ts=6ada0cc9 cx=c_pps a=+D9SDfe9YZWTjADjLiQY5g==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=5fzcQa2O_f0PTkyQNbAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=vmgOmaN-Xu0dpDh8OwbV:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-22_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 clxscore=1015 adultscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610220052 On 10/22/26 3:08 PM, Loic Poulain wrote: > On Thu, Oct 22, 2026 at 11:34 AM Konrad Dybcio > wrote: >> >> On 10/13/26 10:13 AM, Loic Poulain wrote: >>> Hi Folks, >>> >>> On Mon, Sep 21, 2026 at 2:38 PM Konrad Dybcio >>> wrote: >> >> [...] >> >>>>>> We are adding M.2 Key E connector support for monaco-evk [2]. Konrad >>>>>> suggested moving the port/endpoint anchor nodes to the SoC DTSI >>>>>> (monaco.dtsi) for clean DTS layering, so that board files only need to >>>>>> fill in remote-endpoint for boards that actually have an M.2 connector. >>>>>> >>>>> >>>>> This means, the dummy port/endpoint node will always be present even when the >>>>> M.2 connector is not used. I don't see a compelling reason to do so. >>>> >>>> I don't really see a compelling reason to defer re-defining them to each >>>> device DT either.. >>> >>> Adding an empty port/endpoint at the SoC level is problematic for >>> uart, port is not always expected, this depends if the uart is exposed >>> through a connector or to an onboard device. So we may end with an >>> unconnected endpoint but still have a bluetooth subnode, which can be >>> a bit confusing... Also why adding a port/endpoint only for a specific >>> uart in the dts, and not for the others? This is a board/SoC level >>> choice to use a specific uart for M2 or not. >> >> From my perspective it's removing boilerplate. Currently all USB and >> PCIe hosts already define their ports and endpoints in the SoC DTSI >> and if they're unconnected, then simply nothing happens. >> >> Both 'ports' and 'endpoints' are an abstract property that signify >> 'X can be related to Y' and I don't see how that's a problem here given >> UART is very much expected to be connected "somewhere" (with the >> "somewhere" perhaps being external/a pin header) > > Yes, but in the UART case, where the connection can be represented in > different ways, we can end up with devices being described as both > unconnected (no remote endpoint) and connected (via a child device). > We can probably live with that, but if we go in this direction, we > should consider adding a port/endpoint definition for every UART > instance in the DTSI for consistency. The same would apply to I2C once > endpoint support is available there as well. Guess so! Konrad