From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1751329AbdKVJOm (ORCPT <rfc822;w@1wt.eu>);
        Wed, 22 Nov 2017 04:14:42 -0500
Received: from mail-wm0-f51.google.com ([74.125.82.51]:39510 "EHLO
        mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1751247AbdKVJOi (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Wed, 22 Nov 2017 04:14:38 -0500
X-Google-Smtp-Source: AGs4zMZsC3xAindVM4QZBj0lWVITXtr7bkIMhqoIs4oftDCjCKssk2geAcE9FuIax+1jtsJaAZroBQ==
Subject: Re: [PATCH 2/4] ARM: dts: imx6qdl: Add Variscite DART-MX6 SoM support
To: Fabio Estevam <festevam@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <kernel@pengutronix.de>,
        Fabio Estevam <fabio.estevam@nxp.com>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>
References: <1511281705-30849-1-git-send-email-narmstrong@baylibre.com>
 <1511281705-30849-3-git-send-email-narmstrong@baylibre.com>
 <CAOMZO5BDQxZxHX_dn63QvbwfaVjERQtBqCp3FCT9Q6zvsrgn4w@mail.gmail.com>
From: Neil Armstrong <narmstrong@baylibre.com>
Organization: Baylibre
Message-ID: <b1a1ac14-5ff3-08bf-a3ee-27dd7641c7fe@baylibre.com>
Date: Wed, 22 Nov 2017 10:14:36 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101
 Thunderbird/52.4.0
MIME-Version: 1.0
In-Reply-To: <CAOMZO5BDQxZxHX_dn63QvbwfaVjERQtBqCp3FCT9Q6zvsrgn4w@mail.gmail.com>
Content-Type: text/plain; charset=utf-8
Content-Language: en-US
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi Fabio,

On 21/11/2017 17:54, Fabio Estevam wrote:
> On Tue, Nov 21, 2017 at 2:28 PM, Neil Armstrong <narmstrong@baylibre.com> wrote:
> 
>> +       reg_wl18xx_vmmc: regulator-wl18xx {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "vwl1807";
>> +               regulator-min-microvolt = <1800000>;
>> +               regulator-max-microvolt = <1800000>;
>> +               gpio = <&gpio7 8 0>;
> 
> GPIO_ACTIVE_HIGH please.

OK

> 
>> +&can2 {
>> +       pinctrl-names = "default";
>> +       pinctrl-0 = <&pinctrl_flexcan2>;
>> +       status = "disabled";
>> +};
>> +
>> +&cpu0 {
>> +       arm-supply = <&sw1a_reg>;
>> +       soc-supply = <&sw1c_reg>;
>> +       operating-points = <
>> +               /* kHz    uV */
>> +               1200000 1350000
>> +               996000  1250000
>> +               852000  1250000
>> +               792000  1175000
>> +               396000  1175000
>> +       >;
>> +       fsl,soc-operating-points = <
>> +               /* ARM kHz  SOC-PU uV */
>> +               1200000 1275000
>> +               996000  1250000
>> +               852000  1250000
>> +               792000  1175000
>> +               396000  1175000
>> +       >;
> 
> 
> Don't the standard operating points described at imx6q.dtsi work on this board?
> 
> If not, please add a comment explaining why you need custom operating
> points here.

It should, I will remove them, anyway it will conflict with the ones in imx6dl.dtsi.

> 
>> +       pinctrl_flexcan1: flexcan1grp {
>> +               fsl,pins = <
>> +                       MX6QDL_PAD_GPIO_7__FLEXCAN1_TX          0x80000000
>> +                       MX6QDL_PAD_GPIO_8__FLEXCAN1_RX          0x80000000
> 
> Please avoid 0x80000000 and use the real IOMUX values instead.

Ok, will replace with 0x1b0b0

> 
>> +               >;
>> +       };
>> +
>> +       pinctrl_flexcan2: flexcan2grp {
>> +               fsl,pins = <
>> +                       MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX        0x80000000
>> +                       MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX        0x80000000
> 
> Please avoid 0x80000000 and use the real IOMUX values instead.
> 

Same here.

Thanks,
Neil