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Wed, 27 Aug 2025 02:17:27 -0700 (PDT) Message-ID: Date: Wed, 27 Aug 2025 10:17:26 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] coresight: tpda: add sysfs node to flush specific port To: Jie Gan Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Tingwei Zhang References: <20250827042042.6786-1-jie.gan@oss.qualcomm.com> <20250827042042.6786-4-jie.gan@oss.qualcomm.com> Content-Language: en-US From: James Clark In-Reply-To: <20250827042042.6786-4-jie.gan@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 27/08/2025 5:20 am, Jie Gan wrote: > From: Tao Zhang > > Setting bit i in the TPDA_FLUSH_CR register initiates a flush request > for port i, forcing the data to synchronize and be transmitted to the > sink device. > > Signed-off-by: Tao Zhang > Co-developed-by: Jie Gan > Signed-off-by: Jie Gan > --- > .../testing/sysfs-bus-coresight-devices-tpda | 7 ++++ > drivers/hwtracing/coresight/coresight-tpda.c | 42 +++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 2 + > 3 files changed, 51 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > index fb651aebeb31..2cf2dcfc13c8 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda > @@ -41,3 +41,10 @@ Contact: Jinlong Mao , Tao Zhang Description: > (RW) Configure the CMB/MCMB channel mode for all enabled ports. > Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode. > + > +What: /sys/bus/coresight/devices//port_flush_req > +Date: August 2025 > +KernelVersion: 6.17 > +Contact: Jinlong Mao , Tao Zhang , Jie Gan > +Description: > + (RW) Configure the bit i to requests a flush operation of port i on the TPDA. > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index 430f76c559f2..8b1fe128881d 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -487,6 +487,47 @@ static ssize_t cmbchan_mode_store(struct device *dev, > } > static DEVICE_ATTR_RW(cmbchan_mode); > > +static ssize_t port_flush_req_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (!drvdata->csdev->refcnt) > + return -EINVAL; > + > + guard(spinlock)(&drvdata->spinlock); > + CS_UNLOCK(drvdata->base); > + val = readl_relaxed(drvdata->base + TPDA_FLUSH_CR); > + CS_LOCK(drvdata->base); > + return sysfs_emit(buf, "%lx\n", val); Still missing the 0x prefix > +} > + > +static ssize_t port_flush_req_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); > + unsigned long val; > + > + if (kstrtoul(buf, 0, &val)) > + return -EINVAL; > + > + if (!drvdata->csdev->refcnt || !val) > + return -EINVAL; > + > + val |= FIELD_PREP(TPDA_MAX_INPORTS_MASK, val); Using FIELD_PREP() now that it's the full width of the register makes less sense. Especially when there is no corresponding FIELD_FIT() check, which is fine because everything always fits. But if you didn't know the mask was the full width you'd wonder if the check is missing. I would just write val directly to TPDA_FLUSH_CR so it's simpler. It should also have been val = FIELD_PREP(...) > + guard(spinlock)(&drvdata->spinlock); > + CS_UNLOCK(drvdata->base); > + writel_relaxed(val, drvdata->base + TPDA_FLUSH_CR); > + CS_LOCK(drvdata->base); > + > + return size; > +} > +static DEVICE_ATTR_RW(port_flush_req); > + > static struct attribute *tpda_attrs[] = { > &dev_attr_trig_async_enable.attr, > &dev_attr_trig_flag_ts_enable.attr, > @@ -494,6 +535,7 @@ static struct attribute *tpda_attrs[] = { > &dev_attr_freq_ts_enable.attr, > &dev_attr_global_flush_req.attr, > &dev_attr_cmbchan_mode.attr, > + &dev_attr_port_flush_req.attr, > NULL, > }; > > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index 8e1b66115ad1..56d3ad293e46 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -10,6 +10,7 @@ > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > #define TPDA_SYNCR (0x08C) > +#define TPDA_FLUSH_CR (0x090) > > /* Cross trigger FREQ packets timestamp bit */ > #define TPDA_CR_FREQTS BIT(2) > @@ -35,6 +36,7 @@ > #define TPDA_SYNCR_MAX_COUNTER_VAL (0xFFF) > > #define TPDA_MAX_INPORTS 32 > +#define TPDA_MAX_INPORTS_MASK GENMASK(31, 0) > > /* Bits 6 ~ 12 is for atid value */ > #define TPDA_CR_ATID GENMASK(12, 6)