From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1439FC433E0 for ; Mon, 8 Mar 2021 12:02:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D65BA651A0 for ; Mon, 8 Mar 2021 12:02:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231805AbhCHMCZ (ORCPT ); Mon, 8 Mar 2021 07:02:25 -0500 Received: from mga06.intel.com ([134.134.136.31]:31226 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231592AbhCHMCC (ORCPT ); Mon, 8 Mar 2021 07:02:02 -0500 IronPort-SDR: idO0w4Gj6XLmgMnobkU4djBrbbO4bQERtFgUUxkmoj5sA34CY8wjafbLa/qsU4Zl3JK3ZInsxK mxKE2pDINK5w== X-IronPort-AV: E=McAfee;i="6000,8403,9916"; a="249392912" X-IronPort-AV: E=Sophos;i="5.81,232,1610438400"; d="scan'208";a="249392912" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2021 04:02:01 -0800 IronPort-SDR: E4eWEzz3M91SoK7Ba57k2QiKDBTD3PA3L0Gt/Fil8oVrwjzYX6GsV16oQ92n6/FNrSKGPPtK03 xQSr9NGyHsWA== X-IronPort-AV: E=Sophos;i="5.81,232,1610438400"; d="scan'208";a="409271094" Received: from likexu-mobl1.ccr.corp.intel.com (HELO [10.249.171.152]) ([10.249.171.152]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2021 04:01:57 -0800 Subject: Re: [PATCH] x86/perf: Fix guest_get_msrs static call if there is no PMU To: Peter Zijlstra Cc: Sean Christopherson , Dmitry Vyukov , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , "H. Peter Anvin" , linux-kernel@vger.kernel.org, Like Xu , Paolo Bonzini , Jim Mattson , kvm@vger.kernel.org, Thomas Gleixner "(x86/pti/timer/core/smp/irq/perf/efi/locking/ras/objtool)" "(x86@kernel.org)" , Borislav Petkov , Arnaldo Carvalho de Melo , Ingo Molnar References: <20210305223331.4173565-1-seanjc@google.com> <053d0a22-394d-90d0-8d3b-3cd37ca3f378@intel.com> From: "Xu, Like" Message-ID: Date: Mon, 8 Mar 2021 20:01:52 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021/3/8 16:53, Peter Zijlstra wrote: > Still, it calling atomic_switch_perf_msrs() and > intel_pmu_lbr_is_enabled() when there isn't a PMU at all is of course, a > complete waste of cycles. This suggestion is reminiscent of a sad regression of optimizing it: https://lore.kernel.org/kvm/20200619094046.654019-1-vkuznets@redhat.com/ https://lore.kernel.org/kvm/20210209225653.1393771-1-jmattson@google.com/