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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ba45503c414sm519877666b.44.2026.04.22.02.54.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Apr 2026 02:54:32 -0700 (PDT) Message-ID: Date: Wed, 22 Apr 2026 11:54:30 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] phy: qualcomm: qmp-combo: update DP PHY PLL programming on Glymur To: Mahadevan P , Dmitry Baryshkov Cc: Vinod Koul , Neil Armstrong , Wesley Cheng , Abel Vesa , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Ritesh Kumar References: <20260419-glymur_dp-v1-1-ad1067a8e8ae@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: ghVZj19KOwKe7Yu3hcjRAXWkrHBoEtoQ X-Authority-Analysis: v=2.4 cv=SONykuvH c=1 sm=1 tr=0 ts=69e89ada cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=TPV1Kb3VoT3DjyXF_ZUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-ORIG-GUID: ghVZj19KOwKe7Yu3hcjRAXWkrHBoEtoQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIyMDA5MyBTYWx0ZWRfX4cLfu9EbfVHr swFB05ur6W/TamP/N+wdcKMbky5TocvIwOWRs+mqlO5o1xqq7VlnyCm2vpqer8Ogz0yYdWHsqfL TGZDlOYzEVV5d66MM8CaE+XuQHSf3r1czTs2m0GFruCqiXgmA3Le7vRkoUIQUwJUpUz/1vdTjTq yW5JU5necOi6dQdXaSpy8r22TS287jLT5XldDsly3ng/M88ALT0mc//0yaekUuoniS1q5vSDy1z a2ZDnLC5rHTNiyNKXVA0FhZFoVswtcxYTSufGzvCPbGTxY9FO4b8aia1FWUe9A1r3wM0eY7Aq4P PC86Is2leLtMt5IiYrVsLxLD/epGF9zr5akCL0dZtqlHTWpwl8t3phZISeJYdskw7i16gZWlXhb F/6Ge9OTLIs3/mB+GSy2w4cNKjJqhMGeO3ohR/JIPchl5+nM8k7LO1YRnKUWJnnmns86RLy/+jq uda5P1SEBiUSI/mmejQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-22_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 adultscore=0 impostorscore=0 malwarescore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604220093 On 4/20/26 4:18 PM, Mahadevan P wrote: > > > On 4/19/2026 6:48 PM, Dmitry Baryshkov wrote: >> On Sun, 19 Apr 2026 at 13:16, Mahadevan P wrote: >>> >>> The existing DP PHY PLL and AUX configuration for the Glymur platform >>> does not fully follow the Hardware Programming Guide requirements for >>> DP over Type-C, which results in DP link bring-up failures. >>> >>> Update the DP PHY programming sequence and PLL-related register >>> settings to align with the latest HPG recommendations. With this >>> change, DP link training completes successfully on Glymur-based >>> platforms. >>> >>> Fixes: d10736db98d2 ("phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms") >>> Signed-off-by: Ritesh Kumar >>> Signed-off-by: Mahadevan P >>> --- [...] >>> +       writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); >>> + >>> +       writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE); >> >> Are you saying that we don't need to write 0x4c here in case of the >> reverse mode? Was that changed and why? > Yes for glymur it is changed > DP2_PHY_DP_PHY_PD_CTL > Normal Orientation: 0x7D for 4lane; 0x75 for 1Lane or 2Lanne > Flip Orientation: 0x7D for 4Lane; 0x6D for 1Lane or 2Lane Dmitry asked about the other register - DP_PHY_MODE. I checked the reg description, and at least for Glymur, BIT(5) (the difference between 0x4c and 0x5c) says "take bit 4 into consideration, otherwise let the HW decide". I wonder if we need to set it at all, for any target. Konrad