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[2003:e5:873a:400:704b:6dbb:e7c0:786e]) by smtp.gmail.com with ESMTPSA id fd6-20020a056402388600b0056c53ea5affsm8842085edb.77.2024.04.04.03.33.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Apr 2024 03:33:31 -0700 (PDT) Message-ID: Date: Thu, 4 Apr 2024 12:33:31 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] x86/boot: Explicitly pass NX enabling status Content-Language: en-US To: Dave Hansen , linux-kernel@vger.kernel.org Cc: tglx@linutronix.de, x86@kernel.org, bp@alien8.de, kai.huang@intel.com References: <20240403153508.7328E749@davehans-spike.ostc.intel.com> <20240403153513.76C52354@davehans-spike.ostc.intel.com> From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= In-Reply-To: <20240403153513.76C52354@davehans-spike.ostc.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 03.04.24 17:35, Dave Hansen wrote: > From: Dave Hansen > > The kernel sometimes needs to mask unsupported bits out of page > table entries. It does that with a mask: '__supported_pte_mask'. > > That mask can obviously only contain the No-eXecute bit (_PAGE_NX) > on hardware where NX is supported. x86_configure_nx() checks the > boot CPU's NX support and adjusts the mask appropriately. > > But it doesn't check support directly. It uses the venerable > 'boot_cpu_data' which is a software approximation of the actual CPU > support. Unfortunately, Xen wants to set up '__supported_pte_mask' > before 'boot_cpu_data' has been initialized. It hacks around this > problem by repeating some of the 'boot_cpu_data' setup *just* for > NX. > > Have x86_configure_nx() stop consulting 'boot_cpu_data' and move > the NX detection to the caller. > > No functional change. That will come later. > > Signed-off-by: Dave Hansen > Reviewed-by: Kai Huang Reviewed-by: Juergen Gross Juergen