From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B13347A0C5; Wed, 21 Jan 2026 12:57:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769000254; cv=none; b=CrZXsooM7WX1DiJS74/K/Q/wvVldqMwLnynOG1OE/O6obj4mAmI7f5y5AQcPugkcrxFfcTicdeTHvjXcdIw+r9mCcpKW8nKhPhvz5+8nmqtVs4GWRo6GLK94iCeS4b254LIAnoSOoC06C3as5dKPVMuawKKJ1ZMGqAl8MQnA7MA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769000254; c=relaxed/simple; bh=CCmqtZxHimMbTarGsKsjY7/WDLQlWYB4cMelVnEB9s8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HtObx5pjRropWpBsI+XGApiJRzR6N5Od8nOSNP3gLeMWYRnN1HUmZ7B8Oby4Du0aYWO5PgaG8rFqFQKhYcbqOW4ocEcaJYmGB6tZyJd+p4Qpxc3USX0aFfEuR8xTspkKmn6xQLgVwxS2bsH70CcIDY9qAFV27gnT6eaAAXyKElY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=iFVf/pZi; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="iFVf/pZi" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=b7ghTfnkGlMABgB6b39pbrc4sBL1ZVp7IHCaNMdWFww=; b=iFVf/pZiPKFKH1RjII4ZTl2l9y 6XgHI1657zr28jOqp4azg5wqRjGA1XekJ0r46jLQCx2IqhnfHGqIyHY2G6oRLzXDp9h7zY9zQ3uqq 9JZ6IPipBWrq7JMhjepyho9QqC34jtHka+ALzQbLLrIevdjKCQJX+NX+e5x15IQM74r0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1viXlv-003ooy-C2; Wed, 21 Jan 2026 13:57:19 +0100 Date: Wed, 21 Jan 2026 13:57:19 +0100 From: Andrew Lunn To: Chaoyi Chen Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Alexey Charkov , Shawn Lin , Sebastian Reichel , Chaoyi Chen , Andy Yan , Nicolas Frattaroli , Detlev Casanova , Stephen Chen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board Message-ID: References: <20260121031548.402-1-kernel@airkyi.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260121031548.402-1-kernel@airkyi.com> On Wed, Jan 21, 2026 at 11:15:45AM +0800, Chaoyi Chen wrote: > From: Chaoyi Chen > > According to the description in the net documentation, PHY modes > "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal > to be delayed on the PCB. > > The Rockchip platform has long used the above mentioned PHY modes and > private delay prop to describe the internal IO delay settings of the > chip, which is inconsistent with what is described in the documentation. > > Some background, for RK3576, you can assume that: > > tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105 Where did this formula come from? Is it in the datasheet. Andrew