From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver
Date: Mon, 3 Feb 2025 15:38:37 +0100 [thread overview]
Message-ID: <b2bcd64e-274e-4b51-9d9f-68bf7c8244ee@linaro.org> (raw)
In-Reply-To: <7srflbpb72amuky33bv2etyuo2wcmrcmrlc6sknx37gzp6v6s2@qpxelvzoo6gd>
On 03/02/2025 15:35, Dmitry Baryshkov wrote:
>>>
>>> PLease add these bits to the corresponding XML file (here and later on)
>>
>>
>> I need some more input from you - I don't know which XML you talk about.
>> Do you think about:
>> drivers/gpu/drm/msm/registers/display/dsi_phy_7nm.xml
>
> Yes
>
>> and others alike? But doesn't it have only register offsets, not field
>> offsets?
>
> It can, see for example the mdp5.xml, you can add <bitfield> under the
> <reg> node. Be sure to install python3-lxml and enable
> CONFIG_DRM_MSM_VALIDATE_XML if you are modifying those files.
Ack
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-02-03 14:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-31 15:02 [PATCH 0/3] drm/msm/dsi/phy: Improvements around concurrent PHY_CMN_CLK_CFG[01] Krzysztof Kozlowski
2025-01-31 15:02 ` [PATCH 1/3] drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side Krzysztof Kozlowski
2025-01-31 15:02 ` [PATCH 2/3] drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver Krzysztof Kozlowski
2025-01-31 16:25 ` Dmitry Baryshkov
2025-02-03 11:19 ` Krzysztof Kozlowski
2025-02-03 14:35 ` Dmitry Baryshkov
2025-02-03 14:38 ` Krzysztof Kozlowski [this message]
2025-01-31 15:02 ` [PATCH 3/3] drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk source Krzysztof Kozlowski
2025-01-31 16:27 ` Dmitry Baryshkov
2025-01-31 16:24 ` [PATCH 0/3] drm/msm/dsi/phy: Improvements around concurrent PHY_CMN_CLK_CFG[01] Dmitry Baryshkov
2025-02-03 11:16 ` Krzysztof Kozlowski
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