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([2a05:6e02:1041:c10:cf24:cce:17df:12ab]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4266f6f20c0sm5077845e9.20.2024.07.08.09.40.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jul 2024 09:40:51 -0700 (PDT) Message-ID: Date: Mon, 8 Jul 2024 18:40:51 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/7] MIPS: clocksource cumulative enhancements To: Thomas Bogendoerfer , Jiaxun Yang Cc: Serge Semin , Thomas Gleixner , "Maciej W. Rozycki" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= References: <20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com> Content-Language: en-US From: Daniel Lezcano In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 03/07/2024 17:24, Thomas Bogendoerfer wrote: > On Wed, Jun 12, 2024 at 09:54:27AM +0100, Jiaxun Yang wrote: >> Hi all, >> >> This series combined many enhancements for MIPS clocksource subsystems, >> It improved r4k count synchronisation process, clock source rating for >> selection, sched_clock eligibility and so on. >> >> It seems fixed random RCU stall issue on Loongson 3A4000 multi-node >> system and some boot failures on QEMU. >> >> Please review. >> >> Thanks >> >> Signed-off-by: Jiaxun Yang >> --- >> Changes in v2: >> - Fix number of zeros in rating computation (Maciej) >> - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) >> - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com >> >> --- >> Jiaxun Yang (7): >> MIPS: csrc-r4k: Refine rating computation >> MIPS: csrc-r4k: Apply verification clocksource flags >> MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT >> MIPS: csrc-r4k: Don't register as sched_clock if unfit >> MIPS: sync-r4k: Rework based on x86 tsc_sync > > applied these patches to mips-next. > >> clocksource: mips-gic-timer: Refine rating computation >> clocksource: mips-gic-timer: Correct sched_clock width > > looks like the remaining patches don't have any dependency to the other > five patches, so they could just go via clocksource tree. BTW it would > be good to split series in such cases. Applied patches 6 and 7 Thanks -- Daniel -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog