Re: [PATCH 2/2] clocksource/drivers/timer-tegra186: Simplify calculating timeleft

[Jon Hunter <jonathanh@nvidia.com>]

On 14/06/2025 18:55, Guenter Roeck wrote:
> It is not necessary to use 64-bit operations to calculate the
> remaining watchdog timeout. Simplify to use 32-bit operations,
> and add comments explaining why there will be no overflow.
> 
> Cc: Pohsun Su <pohsuns@nvidia.com>
> Cc: Robert Lin <robelin@nvidia.com>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> ---
>   drivers/clocksource/timer-tegra186.c | 25 +++++++++++++++----------
>   1 file changed, 15 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-tegra186.c
> index 7b506de65438..6ed319bb4e06 100644
> --- a/drivers/clocksource/timer-tegra186.c
> +++ b/drivers/clocksource/timer-tegra186.c
> @@ -231,7 +231,7 @@ static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device *wdd)
>   {
>   	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);
>   	u32 expiration, val;
> -	u64 timeleft;
> +	u32 timeleft;
>   
>   	if (!watchdog_active(&wdt->base)) {
>   		/* return zero if the watchdog timer is not activated. */
> @@ -266,21 +266,26 @@ static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device *wdd)
>   	 * Calculate the time remaining by adding the time for the
>   	 * counter value to the time of the counter expirations that
>   	 * remain.
> +	 * Note: Since wdt->base.timeout is bound to 255, the maximum
> +	 * value added to timeleft is
> +	 *   255 * (1,000,000 / 5) * 4
> +	 * = 255 * 200,000 * 4
> +	 * = 204,000,000
> +	 * TMRSR_PCV is a 29-bit field.
> +	 * Its maximum value is 0x1fffffff = 536,870,911.
> +	 * 204,000,000 + 536,870,911 = 740,870,911 = 0x2C28CAFF.
> +	 * timeleft can therefore not overflow, and 64-bit calculations
> +	 * are not necessary.

Nit, I may have worded this the other way around and said that 'timeleft 
  cannot overflow a 32-bit type and so 32-bit variables are sufficient 
for this calculation'. Simply because there are no longer any 64-bit 
variables used now. Anyway from the history of the change it will be 
clear where this came from.

>   	 */
> -	timeleft += ((u64)wdt->base.timeout * (USEC_PER_SEC / 5)) * (4 - expiration);
> +	timeleft += (wdt->base.timeout * (USEC_PER_SEC / 5)) * (4 - expiration);
>   
>   	/*
>   	 * Convert the current counter value to seconds,
> -	 * rounding up to the nearest second. Cast u64 to
> -	 * u32 under the assumption that no overflow happens
> -	 * when coverting to seconds.
> +	 * rounding to the nearest second.
>   	 */
> -	timeleft = DIV_ROUND_CLOSEST_ULL(timeleft, USEC_PER_SEC);
> +	timeleft = DIV_ROUND_CLOSEST(timeleft, USEC_PER_SEC);
>   
> -	if (WARN_ON_ONCE(timeleft > U32_MAX))
> -		return U32_MAX;
> -
> -	return lower_32_bits(timeleft);
> +	return timeleft;
>   }
>   
>   static const struct watchdog_ops tegra186_wdt_ops = {

Otherwise ...

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon

-- 
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