From: Thomas Zimmermann <tzimmermann@suse.de>
To: Myeonghun Pak <mhun512@gmail.com>, Joel Stanley <joel@jms.id.au>
Cc: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Ryan Chen" <ryan_chen@aspeedtech.com>,
"Billy Tsai" <billy_tsai@aspeedtech.com>,
"Sam Ravnborg" <sam@ravnborg.org>,
"Noralf Trønnes" <noralf@tronnes.org>,
linux-aspeed@lists.ozlabs.org, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, "Ijae Kim" <ae878000@gmail.com>
Subject: Re: [PATCH] drm/aspeed: Balance the display clock enable on teardown
Date: Mon, 14 Sep 2026 08:36:44 +0200 [thread overview]
Message-ID: <b2f48121-30c3-4530-9687-3e8757172816@suse.de> (raw)
In-Reply-To: <20260913223019.89651-1-mhun512@gmail.com>
Am 14.09.26 um 00:30 schrieb Myeonghun Pak:
> aspeed_gfx_load() enables the display clock without checking the return
> value and never disables it on probe failure or removal. devm_clk_get()
> only releases the clock reference, leaving the enable unbalanced.
>
> Use devm_clk_get_enabled() to handle enable failures and automatically
> disable and unprepare the clock on probe failure or removal.
>
> This issue was identified during our ongoing static-analysis research
> while reviewing kernel code.
>
> Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver")
> Co-developed-by: Ijae Kim <ae878000@gmail.com>
> Signed-off-by: Ijae Kim <ae878000@gmail.com>
> Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
> Assisted-by: OpenAI:GPT-5.6
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
> Validated with an ARM64 W=1 object build and strict checkpatch.
> No hardware runtime, clock-failure injection or unbind testing was done.
>
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> index d4577663a..aa36b79d0 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> @@ -189,13 +189,12 @@ static int aspeed_gfx_load(struct drm_device *drm)
> }
> reset_control_deassert(priv->rst);
>
> - priv->clk = devm_clk_get(drm->dev, NULL);
> + priv->clk = devm_clk_get_enabled(drm->dev, NULL);
> if (IS_ERR(priv->clk)) {
> dev_err(&pdev->dev,
> - "missing or invalid clk device tree entry");
> + "failed to get and enable clock\n");
> return PTR_ERR(priv->clk);
> }
> - clk_prepare_enable(priv->clk);
>
> /* Sanitize control registers */
> writel(0, priv->base + CRT_CTRL1);
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, (HRB 36809, AG Nürnberg)
prev parent reply other threads:[~2026-09-14 6:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-13 22:30 Myeonghun Pak
2026-09-14 6:36 ` Thomas Zimmermann [this message]
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