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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b1b24938bdsm1066615a91.1.2026.11.12.22.27.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Nov 2026 22:27:07 -0800 (PST) Message-ID: Date: Fri, 13 Nov 2026 14:27:02 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/9] cpufreq: tegra194: move MPIDR read to CPU hotplug callback To: Sumit Gupta , rafael@kernel.org, viresh.kumar@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, treding@nvidia.com, jonathanh@nvidia.com, linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: bbasu@nvidia.com, Zhongqiu Han References: <20261104181521.3003578-1-sumitg@nvidia.com> <20261104181521.3003578-2-sumitg@nvidia.com> Content-Language: en-US From: Zhongqiu Han In-Reply-To: <20261104181521.3003578-2-sumitg@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=S+5MU4sP c=1 sm=1 tr=0 ts=6af6adbe cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=Ikd4Dj_1AAAA:8 a=YW4SVfrvFGduW5-3T3kA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEzMDAyNSBTYWx0ZWRfXx2BKjHn3hMKc ayq48vsvUSxfvaIskfz1AHsfF4+KPqM9gGrVVII96d3teFx4nh6DdEP/VfMPas3cZ+B5fez8b75 UHdYZcVMNqgP/6HpWQ/57XvHnAVaO9aDr3OufmimT4Osm4rFXevahO9AJwcvoKW2GtO+WWZIfFM 4WTQJtRy3wF7SJvQt0X6sc/O6nyCNX85DmHYanYPWeTohtDNcAmhn5fa9DlYqIvI7kzEtpAkPvV 7gH1JzNzBffHDFFINWKtkyVy0DvrTLt9rA+DpRkPeFKD6BoPlYIX0ypOvaoehPdIxC7VO0ZwjHN +ZmKIsKslNJfQyf8e7J/AS/QqOY3/fhfmT3ITfsfM6B8uzBj4JPkl1gEJgTrZMC9xKK5/KoGUoO jS6y5w0f220G3e71MUvv227SiLo4AzExnAVtKhzi/pmIFC49iFKbNuRHcjSVSU42HbOdMASrzpP RJRGd6wTZLxPH1EciGQ== X-Proofpoint-ORIG-GUID: pUFBO-9CLxwkn09DUUaii5uJIXf_SIb7 X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEzMDAyNSBTYWx0ZWRfX3CbEem94u7ab 7PnqwUp+R6dP2pzxQJwo2vIywQ97GW5dI40uMzcJl+lpm00O+NaTthJZCTfPzZj/Bu/+PakTSI+ hkhzG1azesX5fAkJIYdgoiM2/+NSibE= X-Proofpoint-GUID: pUFBO-9CLxwkn09DUUaii5uJIXf_SIb7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-13_02,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611130025 On 11/5/2026 2:15 AM, Sumit Gupta wrote: > At probe the driver reads the MPIDR of every possible CPU with > smp_call_function_single(). For a CPU that is offline at boot, the call > fails and the error is ignored, so the CPU's core and cluster IDs come > from an uninitialised variable. > > Read MPIDR from a CPU-hotplug online callback instead, which runs on the > target CPU and caches its core and cluster IDs and MMIO scratch address. > This covers CPUs online at probe and CPUs onlined later. > > The check that the SoC data covers all CPUs moves to probe, against > nr_cpu_ids. A CPU whose MPIDR does not fit the SoC data gets no scratch > address, and its NDIV access is skipped. > > Fixes: 6b121b4cf7e1 ("cpufreq: tegra194: save CPU data to avoid repeated SMP calls") > Signed-off-by: Sumit Gupta > --- > drivers/cpufreq/tegra194-cpufreq.c | 114 ++++++++++++++++++++--------- > 1 file changed, 79 insertions(+), 35 deletions(-) > > diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c > index 1eb96e9f3310..be81ffd23edd 100644 > --- a/drivers/cpufreq/tegra194-cpufreq.c > +++ b/drivers/cpufreq/tegra194-cpufreq.c > @@ -5,6 +5,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -13,7 +14,7 @@ > #include > #include > > -#include > +#include > > #include > #include > @@ -77,6 +78,8 @@ struct tegra194_cpufreq_data { > const struct tegra_cpufreq_soc *soc; > bool icc_dram_bw_scaling; > struct tegra_cpu_data *cpu_data; > + enum cpuhp_state cpuhp_state; > + struct hlist_node cpuhp_node; > }; > > static struct workqueue_struct *read_counters_wq; > @@ -113,7 +116,7 @@ static void tegra234_get_cpu_cluster_id(u32 cpu, u32 *cpuid, u32 *clusterid) > { > u64 mpidr; > > - smp_call_function_single(cpu, tegra_get_cpu_mpidr, &mpidr, true); > + tegra_get_cpu_mpidr(&mpidr); > > if (cpuid) > *cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 1); > @@ -121,11 +124,44 @@ static void tegra234_get_cpu_cluster_id(u32 cpu, u32 *cpuid, u32 *clusterid) > *clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 2); > } > > +static int tegra_cpufreq_cpu_online(unsigned int cpu, struct hlist_node *node) > +{ > + struct tegra194_cpufreq_data *data; > + u32 cpuid, clusterid; > + > + data = hlist_entry(node, struct tegra194_cpufreq_data, cpuhp_node); > + > + data->soc->ops->get_cpu_cluster_id(cpu, &cpuid, &clusterid); > + > + data->cpu_data[cpu].cpuid = cpuid; > + data->cpu_data[cpu].clusterid = clusterid; > + > + /* Derive per-core register address only when ccplex MMIO is mapped. */ > + if (data->regs) { > + if (clusterid >= data->soc->num_clusters || > + cpuid >= data->soc->maxcpus_per_cluster) { > + pr_warn_once("cpufreq: cpu%u: bad MPIDR (cluster %u, core %u)\n", > + cpu, clusterid, cpuid); > + } else { > + u32 index = clusterid * data->soc->maxcpus_per_cluster + cpuid; > + > + data->cpu_data[cpu].freq_core_reg = > + SCRATCH_FREQ_CORE_REG(data, index); > + } > + } > + > + return 0; > +} > + > static int tegra234_get_cpu_ndiv(u32 cpu, u32 cpuid, u32 clusterid, u64 *ndiv) > { > struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); > + void __iomem *reg = data->cpu_data[cpu].freq_core_reg; > + > + if (!reg) > + return -EINVAL; > > - *ndiv = readl(data->cpu_data[cpu].freq_core_reg) & NDIV_MASK; > + *ndiv = readl(reg) & NDIV_MASK; > > return 0; > } > @@ -135,8 +171,12 @@ static void tegra234_set_cpu_ndiv(struct cpufreq_policy *policy, u64 ndiv) > struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); > u32 cpu; > > - for_each_cpu(cpu, policy->cpus) > - writel(ndiv, data->cpu_data[cpu].freq_core_reg); > + for_each_cpu(cpu, policy->cpus) { > + void __iomem *reg = data->cpu_data[cpu].freq_core_reg; > + > + if (reg) > + writel(ndiv, reg); > + } > } > > /* > @@ -208,7 +248,7 @@ static void tegra194_get_cpu_cluster_id(u32 cpu, u32 *cpuid, u32 *clusterid) > { > u64 mpidr; > > - smp_call_function_single(cpu, tegra_get_cpu_mpidr, &mpidr, true); > + tegra_get_cpu_mpidr(&mpidr); .get_cpu_cluster_id() now reads the local MPIDR, so the cpu argument is ignored. Could it be dropped? -- Thx and BRs, Zhongqiu Han