From: Andrew Davis <afd@ti.com>
To: Daniel Schultz <d.schultz@phytec.de>, <nm@ti.com>,
<vigneshr@ti.com>, <kristo@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <upstream@lists.phytec.de>
Subject: Re: [PATCH 1/4] arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
Date: Tue, 6 May 2025 09:16:42 -0500 [thread overview]
Message-ID: <b366f989-3eb5-4716-8dfc-d8f6ce961296@ti.com> (raw)
In-Reply-To: <20250506115502.3515599-2-d.schultz@phytec.de>
On 5/6/25 6:54 AM, Daniel Schultz wrote:
> For every remote processor, set up dedicated memory regions and
> associate the required mailbox channels. Allocate two memory areas
> per remote core: one 1MB region for vring shared buffers, and
> another for external memory used by the remote processor for its
> resource table and trace buffer.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
Reviewed-by: Andrew Davis <afd@ti.com>
> .../boot/dts/ti/k3-am62-phycore-som.dtsi | 35 +++++++++++++++----
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> index 2ef4cbaec789..71d165a7abe0 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
> @@ -57,6 +57,18 @@ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
> no-map;
> };
>
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9da00000 0x00 0x100000>;
> + no-map;
> + };
> +
> + wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9db00000 0x00 0xc00000>;
> + no-map;
> + };
> +
> secure_tfa_ddr: tfa@9e780000 {
> reg = <0x00 0x9e780000 0x00 0x80000>;
> alignment = <0x1000>;
> @@ -68,12 +80,6 @@ secure_ddr: optee@9e800000 {
> alignment = <0x1000>;
> no-map;
> };
> -
> - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
> - compatible = "shared-dma-pool";
> - reg = <0x00 0x9db00000 0x00 0x00c00000>;
> - no-map;
> - };
> };
>
> vcc_5v0_som: regulator-vcc-5v0-som {
> @@ -226,10 +232,17 @@ cpsw3g_phy1: ethernet-phy@1 {
> };
>
> &mailbox0_cluster0 {
> + status = "okay";
> +
> mbox_m4_0: mbox-m4-0 {
> ti,mbox-rx = <0 0 0>;
> ti,mbox-tx = <1 0 0>;
> };
> +
> + mbox_r5_0: mbox-r5-0 {
> + ti,mbox-rx = <2 0 0>;
> + ti,mbox-tx = <3 0 0>;
> + };
> };
>
> &main_i2c0 {
> @@ -365,3 +378,13 @@ &sdhci0 {
> non-removable;
> status = "okay";
> };
> +
> +&wkup_r5fss0 {
> + status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> +};
next prev parent reply other threads:[~2025-05-06 14:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-06 11:54 [PATCH 0/4] {am62,am62a}-phycore-som: Add R5F and C7xv device nodes Daniel Schultz
2025-05-06 11:54 ` [PATCH 1/4] arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors Daniel Schultz
2025-05-06 14:16 ` Andrew Davis [this message]
2025-05-06 11:55 ` [PATCH 2/4] arm64: dts: ti: k3-am62a-phycore-som: " Daniel Schultz
2025-05-06 11:55 ` [PATCH 3/4] arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP Daniel Schultz
2025-05-06 11:55 ` [PATCH 4/4] arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 " Daniel Schultz
2025-05-06 13:31 ` [Upstream] [PATCH 0/4] {am62,am62a}-phycore-som: Add R5F and C7xv device nodes Wadim Egorov
2025-05-06 16:14 ` Judith Mendez
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