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X-CSE-ConnectionGUID: u3XFPhftSOKW31XkEw2T0A== X-CSE-MsgGUID: EqhomqcART6P3yvY+x6Dcw== X-IronPort-AV: E=McAfee;i="6700,10204,11270"; a="44489568" X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="44489568" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 03:39:46 -0800 X-CSE-ConnectionGUID: 85tpzxxPRfmE86pedbEXiw== X-CSE-MsgGUID: Rv8iy6csQdefett5thzfoA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,195,1728975600"; d="scan'208";a="92648836" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.245.115.59]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 03:39:40 -0800 Message-ID: Date: Fri, 29 Nov 2024 13:39:33 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] KVM: TDX: Add TSX_CTRL msr into uret_msrs list To: Sean Christopherson , Chao Gao Cc: pbonzini@redhat.com, kvm@vger.kernel.org, dave.hansen@linux.intel.com, rick.p.edgecombe@intel.com, kai.huang@intel.com, reinette.chatre@intel.com, xiaoyao.li@intel.com, tony.lindgren@linux.intel.com, binbin.wu@linux.intel.com, dmatlack@google.com, isaku.yamahata@intel.com, nik.borisov@suse.com, linux-kernel@vger.kernel.org, x86@kernel.org, yan.y.zhao@intel.com, weijiang.yang@intel.com References: <20241121201448.36170-1-adrian.hunter@intel.com> <20241121201448.36170-8-adrian.hunter@intel.com> Content-Language: en-US From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 27/11/24 16:00, Sean Christopherson wrote: > On Fri, Nov 22, 2024, Chao Gao wrote: >>> +static bool tdparams_tsx_supported(struct kvm_cpuid2 *cpuid) >>> +{ >>> + const struct kvm_cpuid_entry2 *entry; >>> + u64 mask; >>> + u32 ebx; >>> + >>> + entry = kvm_find_cpuid_entry2(cpuid->entries, cpuid->nent, 0x7, 0); >>> + if (entry) >>> + ebx = entry->ebx; >>> + else >>> + ebx = 0; >>> + >>> + mask = __feature_bit(X86_FEATURE_HLE) | __feature_bit(X86_FEATURE_RTM); >>> + return ebx & mask; >>> +} >>> + >>> static int setup_tdparams(struct kvm *kvm, struct td_params *td_params, >>> struct kvm_tdx_init_vm *init_vm) >>> { >>> @@ -1299,6 +1322,7 @@ static int setup_tdparams(struct kvm *kvm, struct td_params *td_params, >>> MEMCPY_SAME_SIZE(td_params->mrowner, init_vm->mrowner); >>> MEMCPY_SAME_SIZE(td_params->mrownerconfig, init_vm->mrownerconfig); >>> >>> + to_kvm_tdx(kvm)->tsx_supported = tdparams_tsx_supported(cpuid); >>> return 0; >>> } >>> >>> @@ -2272,6 +2296,11 @@ static int __init __tdx_bringup(void) >>> return -EIO; >>> } >>> } >>> + tdx_uret_tsx_ctrl_slot = kvm_find_user_return_msr(MSR_IA32_TSX_CTRL); >>> + if (tdx_uret_tsx_ctrl_slot == -1 && boot_cpu_has(X86_FEATURE_MSR_TSX_CTRL)) { >>> + pr_err("MSR_IA32_TSX_CTRL isn't included by kvm_find_user_return_msr\n"); >>> + return -EIO; >>> + } >>> >>> /* >>> * Enabling TDX requires enabling hardware virtualization first, >>> diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h >>> index 48cf0a1abfcc..815ff6bdbc7e 100644 >>> --- a/arch/x86/kvm/vmx/tdx.h >>> +++ b/arch/x86/kvm/vmx/tdx.h >>> @@ -29,6 +29,14 @@ struct kvm_tdx { >>> u8 nr_tdcs_pages; >>> u8 nr_vcpu_tdcx_pages; >>> >>> + /* >>> + * Used on each TD-exit, see tdx_user_return_msr_update_cache(). >>> + * TSX_CTRL value on TD exit >>> + * - set 0 if guest TSX enabled >>> + * - preserved if guest TSX disabled >>> + */ >>> + bool tsx_supported; >> >> Is it possible to drop this boolean and tdparams_tsx_supported()? I think we >> can use the guest_can_use() framework instead. > > Yeah, though that optimized handling will soon come for free[*], and I plan on > landing that sooner than TDX, so don't fret too much over this. > > [*] https://lore.kernel.org/all/20240517173926.965351-1-seanjc@google.com guest_can_use() is per-vcpu whereas we are currently using the CPUID from TD_PARAMS (as per spec) before there are any VCPU's. It is a bit of a disconnect so let's keep tsx_supported for now.