From: ALOK TIWARI <alok.a.tiwari@oracle.com>
To: Tristram.Ha@microchip.com, Andrew Lunn <andrew@lunn.ch>,
Woojung Huh <woojung.huh@microchip.com>,
Russell King <linux@armlinux.org.uk>,
Vladimir Oltean <olteanv@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
UNGLinuxDriver@microchip.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v4] net: dsa: microchip: Add SGMII port support to KSZ9477 switch
Date: Fri, 16 May 2025 10:51:30 +0530 [thread overview]
Message-ID: <b39ee402-c681-4bd3-94a4-e703b63032f1@oracle.com> (raw)
In-Reply-To: <20250516024123.24910-1-Tristram.Ha@microchip.com>
On 16-05-2025 08:11, Tristram.Ha@microchip.com wrote:
> +static int ksz9477_pcs_write(struct mii_bus *bus, int phy, int mmd, int reg,
> + u16 val)
> +{
> + struct ksz_device *dev = bus->priv;
> + int port = ksz_get_sgmii_port(dev);
> +
> + if (mmd == MDIO_MMD_VEND2) {
> + struct ksz_port *p = &dev->ports[port];
> +
> + if (reg == MMD_SR_MII_AUTO_NEG_CTRL) {
> + u16 sgmii_mode = SR_MII_PCS_SGMII << SR_MII_PCS_MODE_S;
> +
> + /* Need these bits for 1000BASE-X mode to work with
> + * AN on.
> + */
> + if (!(val & sgmii_mode))
> + val |= SR_MII_SGMII_LINK_UP |
> + SR_MII_TX_CFG_PHY_MASTER;
> +
> + /* SGMII interrupt in the port cannot be masked, so
> + * make sure interrupt is not enabled as it is not
> + * handled.
> + */
> + val &= ~SR_MII_AUTO_NEG_COMPLETE_INTR;
> + } else if (reg == MII_BMCR) {
> + /* The MII_ADVERTISE register needs to write once
> + * before doing auto-negotiation for the correct
> + * config_word to be sent out after reset.
> + */
> + if ((val & BMCR_ANENABLE) && !p->sgmii_adv_write) {
> + u16 adv;
> +
> + /* The SGMII port cannot disable flow contrl
typo contrl -> control
> + * so it is better to just advertise symmetric
> + * pause.
> + */
> + port_sgmii_r(dev, port, mmd, MII_ADVERTISE,
> + &adv);
> + adv |= ADVERTISE_1000XPAUSE;
> + adv &= ~ADVERTISE_1000XPSE_ASYM;
> + port_sgmii_w(dev, port, mmd, MII_ADVERTISE,
> + adv);
> + p->sgmii_adv_write = 1;
> + } else if (val & BMCR_RESET) {
> + p->sgmii_adv_write = 0;
> + }
> + } else if (reg == MII_ADVERTISE) {
> + /* XPCS driver writes to this register so there is no
> + * need to update it for the errata.
> + */
> + p->sgmii_adv_write = 1;
> + }
> + }
> + port_sgmii_w(dev, port, mmd, reg, val);
a '\n' before return, Apply in other relevant locations as well.
> + return 0;
> +}
Thanks,
Alok
next prev parent reply other threads:[~2025-05-16 5:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 2:41 Tristram.Ha
2025-05-16 5:21 ` ALOK TIWARI [this message]
2025-05-16 8:30 ` Russell King (Oracle)
2025-05-16 21:53 ` Tristram.Ha
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