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Tue, 10 Sep 2024 10:03:36 -0700 (PDT) Received: from [10.67.48.245] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6c534348d6bsm31813256d6.73.2024.09.10.10.03.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Sep 2024 10:03:35 -0700 (PDT) Message-ID: Date: Tue, 10 Sep 2024 10:03:32 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 -next 07/11] PCI: brcmstb: Avoid turn off of bridge reset To: Stanimir Varbanov , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Broadcom internal kernel review list Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jim Quinlan , Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , kw@linux.com, Philipp Zabel , Andrea della Porta , Phil Elwell , Jonathan Bell References: <20240910151845.17308-1-svarbanov@suse.de> <20240910151845.17308-8-svarbanov@suse.de> Content-Language: en-US From: Florian Fainelli Autocrypt: addr=florian.fainelli@broadcom.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/10/24 08:18, Stanimir Varbanov wrote: > On brcm_pcie_turn_off avoid shutdown of bridge reset. > > Signed-off-by: Stanimir Varbanov > --- > drivers/pci/controller/pcie-brcmstb.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index d78f33b33884..185ccf7fe86a 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -234,10 +234,17 @@ struct inbound_win { > u64 cpu_addr; > }; > > +/* > + * Shutting down this bridge on pcie1 means accesses to rescal block > + * will hang the chip if another RC wants to assert/deassert rescal. > + */ Maybe a slightly more detailed comment saying that the RESCAL block is tied to PCIe controller #1, regardless of the number of controllers, and turning off PCIe controller #1 prevents access to the RESCAL register blocks, therefore not other controller can access this register space, and depending upon the bus fabric we may get a timeout (UBUS/GISB), or a hang (AXI). Thanks! -- Florian