From: neil.armstrong@linaro.org
To: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>,
andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com,
mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org,
kishon@kernel.org, abel.vesa@linaro.org, kw@linux.com
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v5 3/3] arm64: dts: qcom: lemans: Add PCIe lane equalization preset properties
Date: Fri, 22 Aug 2025 10:19:49 +0200 [thread overview]
Message-ID: <b4456929-cfd8-4e8e-9def-f7ce0a02d240@linaro.org> (raw)
In-Reply-To: <20250819071649.1531437-4-ziyue.zhang@oss.qualcomm.com>
On 19/08/2025 09:16, Ziyue Zhang wrote:
> Add PCIe lane equalization preset properties with all values set to 5 for
> 8.0 GT/s and 16.0 GT/s data rates to enhance link stability.
>
> Co-developed-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/lemans.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index 64f5378c6a47..c7a09c3605a7 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> @@ -7657,6 +7657,10 @@ pcie0: pcie@1c00000 {
> phys = <&pcie0_phy>;
> phy-names = "pciephy";
>
> + eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
> + eq-presets-16gts = /bits/ 8 <0x55 0x55>;
> +
> +
Please drop this empty line.
Neil
> status = "disabled";
>
> pcieport0: pcie@0 {
> @@ -7827,6 +7831,9 @@ pcie1: pcie@1c10000 {
> phys = <&pcie1_phy>;
> phy-names = "pciephy";
>
> + eq-presets-8gts = /bits/ 16 <0x5555 0x5555 0x5555 0x5555>;
> + eq-presets-16gts = /bits/ 8 <0x55 0x55 0x55 0x55>;
> +
> status = "disabled";
>
> pcie@0 {
prev parent reply other threads:[~2025-08-22 8:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-19 7:16 [PATCH v5 0/3] Add Equalization Settings for 8.0 GT/s and 32.0 GT/s and Add PCIe Lane Equalization Preset Properties for 8.0 GT/s and 16.0 GT/s Ziyue Zhang
2025-08-19 7:16 ` [PATCH v5 1/3] PCI: qcom: Add equalization settings for 8.0 GT/s and 32.0 GT/s Ziyue Zhang
2025-08-22 8:06 ` Manivannan Sadhasivam
2025-08-22 10:05 ` Qiang Yu
2025-08-19 7:16 ` [PATCH v5 2/3] PCI: qcom: fix macro typo for CURSOR Ziyue Zhang
2025-08-19 7:16 ` [PATCH v5 3/3] arm64: dts: qcom: lemans: Add PCIe lane equalization preset properties Ziyue Zhang
2025-08-22 8:19 ` neil.armstrong [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b4456929-cfd8-4e8e-9def-f7ce0a02d240@linaro.org \
--to=neil.armstrong@linaro.org \
--cc=abel.vesa@linaro.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jingoohan1@gmail.com \
--cc=johan+linaro@kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kw@linux.com \
--cc=kwilczynski@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=qiang.yu@oss.qualcomm.com \
--cc=quic_krichai@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
--cc=ziyue.zhang@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®