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From: Ravi Bangoria <ravi.bangoria@amd.com>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: irogers@google.com, acme@kernel.org, jolsa@redhat.com,
	namhyung@kernel.org, peterz@infradead.org, mark.rutland@arm.com,
	adrian.hunter@intel.com, alexander.shishkin@linux.intel.com,
	carsten.haitzler@arm.com, leo.yan@linaro.org,
	maddy@linux.ibm.com, kjain@linux.ibm.com,
	atrajeev@linux.vnet.ibm.com, tmricht@linux.ibm.com,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	sandipan.das@amd.com, ananth.narayan@amd.com,
	santosh.shukla@amd.com, Ravi Bangoria <ravi.bangoria@amd.com>
Subject: Re: [PATCH v2 2/2] perf test: Add event group test
Date: Thu, 1 Dec 2022 21:59:44 +0530	[thread overview]
Message-ID: <b47c4bc7-aed3-e1a0-c791-818af091d976@amd.com> (raw)
In-Reply-To: <c5e97f0e-0039-7e9f-299f-c0d03a6ac33e@linux.intel.com>

On 01-Dec-22 9:17 PM, Liang, Kan wrote:
> 
> 
> On 2022-12-01 10:29 a.m., Ravi Bangoria wrote:
>>>>   /* Uncore pmus that support more than 3 counters */
>>>>   static struct uncore_pmus {
>>>>       char *name;
>>>>       unsigned long config;
>>>>   } uncore_pmus[] = {
>>>>       { "amd_l3",         0x0  },
>>>>       { "amd_df",         0x0  },
>>>>       { "uncore_imc_xxx", 0xff },   /* Intel */
>>>
>>> IMC seems a safe choice. AFAIK, we should have at least uncore_imc_0 for
>>> all the existing Intel platforms. { "uncore_imc_0", 0x1 }
>>
>> Ok. Ian said he don't see uncore_imc_0 on his tigerlake machine. Are you
>> sure uncore_imc_0 should be present on all existing Intel platforms?
> 
> For TGL and older client platforms, there is only free running IMC
> counters. For other uncore PMUs on the old client platforms, I cannot
> guarantee that then always have more then 2 counters. I think you can
> skip the uncore test for these old platforms if you need at least 3
> counters.
> 
> 
>>
>>>>       { "intel_xxx_pmu2", 0xff },   /* Intel */
>>>
>>> Intel doesn't have such uncore PMUs.
>>
>> Yeah this was just for example purpose.
>>
>>>>       { "abc_pmu1",       0x0  },   /* Arm */
>>>>       { "hv_24x7",        0xa  },   /* PowerPC */
>>>>       { ...                    },
>>>>   };
>>>>
>>>>   perf_pmus__for_each_pmu(pmu) {
>>>>       if (pmu present in uncore_pmus[])
>>>>           type[2] = pmu->type;
>>>>           config[2] = pmu->config;>   }
>>>
>>>
>>> Not sure the uncore_pmus[] can cover all possible names for all
>>> architectures.
>>
>> It doesn't need to cover _all_ possible names. It just needs to cover
>> minimal set of names which can cover all platforms for that architecture.
>>>> Maybe we should fall back to the first uncore PMU and try again if
>>> nothing match the uncore_pmus[].
>>
>> That's a good point. However, this can endup with the same problem you
>> mentioned: it may trigger false alarm on some platform. So better to
>> skip the test(and let someone add proper pmu in this list) rather than
>> proving false negative result?
> 
> OK. Skipping the test for this case sounds good to me.

Thanks. Will respin with this change.

Ravi

      reply	other threads:[~2022-12-01 16:30 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-29 11:19 [PATCH v2 0/2] " Ravi Bangoria
2022-11-29 11:19 ` [PATCH v2 1/2] perf tool: Move pmus list variable to new a file Ravi Bangoria
2022-11-29 11:19 ` [PATCH v2 2/2] perf test: Add event group test Ravi Bangoria
2022-11-29 20:13   ` Liang, Kan
2022-12-01  9:13     ` Ravi Bangoria
2022-12-01 14:02       ` Liang, Kan
2022-12-01 15:29         ` Ravi Bangoria
2022-12-01 15:47           ` Liang, Kan
2022-12-01 16:29             ` Ravi Bangoria [this message]

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