From: icenowy@aosc.io
To: maxime.ripard@free-electrons.com
Cc: Chen-Yu Tsai <wens@csie.org>, David Airlie <airlied@linux.ie>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: Re: [linux-sunxi] Re: [PATCH 5/7] drm/sun4i: backend: Offset layer buffer address by DRAM starting address
Date: Mon, 16 Oct 2017 17:42:46 +0800 [thread overview]
Message-ID: <b508ef1c94e5159faf8ca57f3f697e98@aosc.io> (raw)
In-Reply-To: <20171016080043.xqpcxj7xfckcxdem@flea.lan>
在 2017-10-16 16:00，Maxime Ripard 写道：
> Hi,
>
> I've applied all the other patches.
>
> On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
>> The display backend, as well as other peripherals that have a DRAM
>> clock gate and access DRAM directly, bypassing the system bus,
>> address the DRAM starting from 0x0, while physical addresses the
>> system uses starts from 0x40000000 (or 0x20000000 in A80's case).
>>
>> Correct the address configured into the backend layer registers
>> by PHYS_OFFSET to account for this.
>
> However, I'm a bit confused at this.
>
> The driver has been working so far, which it wouldn't have been able
> to if the address was wrong. How was this problem noticed, and how can
> that fix not be an issue in itself?
On devices with <=1GiB (0x40000000) DRAM, the DRAM access will just wrap
back and no problem would be seen.
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
next prev parent reply other threads:[~2017-10-16 9:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-14 4:02 [PATCH 0/7] drm/sun4i: More cleanups Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 1/7] drm/sun4i: don't add components that are already in the queue Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 2/7] drm/sun4i: backend: Create regmap after access is possible Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 3/7] drm/sun4i: backend: Use drm_fb_cma_get_gem_addr() to get display memory Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 4/7] drm/sun4i: backend: Add comment explaining why registers are cleared Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 5/7] drm/sun4i: backend: Offset layer buffer address by DRAM starting address Chen-Yu Tsai
2017-10-16 8:00 ` Maxime Ripard
2017-10-16 8:20 ` [linux-sunxi] " Chen-Yu Tsai
2017-10-16 20:15 ` Maxime Ripard
2017-10-17 3:40 ` Chen-Yu Tsai
2017-10-16 9:42 ` icenowy [this message]
2017-10-14 4:02 ` [PATCH 6/7] drm/sun4i: hdmi: Document PAD_CTRL1 output invert bits Chen-Yu Tsai
2017-10-14 4:02 ` [PATCH 7/7] drm/sun4i: hdmi: Move PAD_CTRL1 setting to mode_set function Chen-Yu Tsai
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