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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa625e96aabsm381402266b.63.2024.12.07.03.59.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 07 Dec 2024 03:59:08 -0800 (PST) Message-ID: Date: Sat, 7 Dec 2024 12:59:05 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/6] arm64: dts: qcom: x1e80100: Add CCI definitions To: Bryan O'Donoghue , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Mauro Carvalho Chehab , Bjorn Andersson , Michael Turquette , Stephen Boyd , Vladimir Zapolskiy , Jagadeesh Kona , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org References: <20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org> <20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-5-54075d75f654@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-5-54075d75f654@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: BlYPhSl6aF4Cw9OU4FBtfxPxoPyEbsGu X-Proofpoint-GUID: BlYPhSl6aF4Cw9OU4FBtfxPxoPyEbsGu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 clxscore=1015 suspectscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412070100 On 19.11.2024 2:10 PM, Bryan O'Donoghue wrote: > Add in 2 CCI busses. One bus has two CCI bus master pinouts: > cci_i2c_scl0 = gpio101 > cci_i2c_sda0 = gpio102 > cci_i2c_scl1 = gpio103 > cci_i2c_sda1 = gpio104 > > A second bus has a single CCI bus master pinout: > cci_i2c_scl2 = gpio105 > cci_i2c_sda2 = gpio106 > > Signed-off-by: Bryan O'Donoghue > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 162 +++++++++++++++++++++++++++++++++ > 1 file changed, 162 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 5119cf64b461eb517e9306869ad0ec1b2cae629e..c19754fdc7e0fa4f674ce19f813db77fe2615cf3 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -4648,6 +4648,88 @@ usb_1_ss1_dwc3_ss: endpoint { > }; > }; > > + cci0: cci@ac15000 { [...] > + cci0_default: cci0-default-state { > + cci0_i2c0_default: cci0-i2c0-default-pins { > + /* cci_i2c_sda0, cci_i2c_scl0 */ > + pins = "gpio101", "gpio102"; > + function = "cci_i2c"; > + > + bias-pull-up; > + drive-strength = <2>; /* 2 mA */ > + }; Please match the style of other nodes (flip drive-strength and bias, remove the newline and remove the mA comment) Otherwise looks good and I can attest to this working, as the sensor on the SL7 happily talks back Konrad