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([2605:a601:adae:4500:9465:402f:4b0a:1116]) by smtp.gmail.com with ESMTPSA id o13-20020a6b5a0d000000b007a669ac1ef4sm2945608iob.40.2023.11.21.13.21.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Nov 2023 13:21:44 -0800 (PST) Message-ID: Date: Tue, 21 Nov 2023 15:21:43 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] riscv: errata: andes: Probe IOCP during boot stage Content-Language: en-US To: Prabhakar , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Geert Uytterhoeven Cc: Yu Chien Peter Lin , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Lad Prabhakar References: <20231121202459.36874-1-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Samuel Holland In-Reply-To: <20231121202459.36874-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023-11-21 2:24 PM, Prabhakar wrote: > From: Lad Prabhakar > > We should be probing for IOCP during boot stage only. As we were probing > for IOCP for all the stages this caused the below issue during module-init > stage, > > [9.019104] Unable to handle kernel paging request at virtual address ffffffff8100d3a0 > [9.027153] Oops [#1] > [9.029421] Modules linked in: rcar_canfd renesas_usbhs i2c_riic can_dev spi_rspi i2c_core > [9.037686] CPU: 0 PID: 90 Comm: udevd Not tainted 6.7.0-rc1+ #57 > [9.043756] Hardware name: Renesas SMARC EVK based on r9a07g043f01 (DT) > [9.050339] epc : riscv_noncoherent_supported+0x10/0x3e > [9.055558]  ra : andes_errata_patch_func+0x4a/0x52 > [9.060418] epc : ffffffff8000d8c2 ra : ffffffff8000d95c sp : ffffffc8003abb00 > [9.067607]  gp : ffffffff814e25a0 tp : ffffffd80361e540 t0 : 0000000000000000 > [9.074795]  t1 : 000000000900031e t2 : 0000000000000001 s0 : ffffffc8003abb20 > [9.081984]  s1 : ffffffff015b57c7 a0 : 0000000000000000 a1 : 0000000000000001 > [9.089172]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : ffffffff8100d8be > [9.096360]  a5 : 0000000000000001 a6 : 0000000000000001 a7 : 000000000900031e > [9.103548]  s2 : ffffffff015b57d7 s3 : 0000000000000001 s4 : 000000000000031e > [9.110736]  s5 : 8000000000008a45 s6 : 0000000000000500 s7 : 000000000000003f > [9.117924]  s8 : ffffffc8003abd48 s9 : ffffffff015b1140 s10: ffffffff8151a1b0 > [9.125113]  s11: ffffffff015b1000 t3 : 0000000000000001 t4 : fefefefefefefeff > [9.132301]  t5 : ffffffff015b57c7 t6 : ffffffd8b63a6000 > [9.137587] status: 0000000200000120 badaddr: ffffffff8100d3a0 cause: 000000000000000f > [9.145468] [] riscv_noncoherent_supported+0x10/0x3e > [9.151972] [] _apply_alternatives+0x84/0x86 > [9.157784] [] apply_module_alternatives+0x10/0x1a > [9.164113] [] module_finalize+0x5e/0x7a > [9.169583] [] load_module+0xfd8/0x179c > [9.174965] [] init_module_from_file+0x76/0xaa > [9.180948] [] __riscv_sys_finit_module+0x176/0x2a8 > [9.187365] [] do_trap_ecall_u+0xbe/0x130 > [9.192922] [] ret_from_exception+0x0/0x64 > [9.198573] Code: 0009 b7e9 6797 014d a783 85a7 c799 4785 0717 0100 (0123) aef7 > [9.205994] ---[ end trace 0000000000000000 ]--- > > This is because we called riscv_noncoherent_supported() for all the stages > during IOCP probe. riscv_noncoherent_supported() function sets > noncoherent_supported variable to true which has an annotation set to > "__ro_after_init" due to which we were seeing the above splat. Fix this by > probing IOCP during boot stage only. > > Fixes: e021ae7f5145 ("riscv: errata: Add Andes alternative ports") > Signed-off-by: Lad Prabhakar > --- > arch/riscv/errata/andes/errata.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/errata/andes/errata.c b/arch/riscv/errata/andes/errata.c > index d2e1abcac967..1c0fef111273 100644 > --- a/arch/riscv/errata/andes/errata.c > +++ b/arch/riscv/errata/andes/errata.c > @@ -60,7 +60,8 @@ void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct al > unsigned long archid, unsigned long impid, > unsigned int stage) > { > - errata_probe_iocp(stage, archid, impid); > + if (stage == RISCV_ALTERNATIVES_BOOT) > + errata_probe_iocp(stage, archid, impid); > > /* we have nothing to patch here ATM so just return back */ > } Reviewed-by: Samuel Holland