From: Dave Jiang <dave.jiang@intel.com>
To: "Koralahalli Channabasappa, Smita" <skoralah@amd.com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>,
Benjamin Cheatham <benjamin.cheatham@amd.com>
Subject: Re: [PATCH v2] cxl/hdm: Avoid incorrect DVSEC fallback when HDM decoders are enabled
Date: Tue, 17 Mar 2026 13:48:26 -0700 [thread overview]
Message-ID: <b5d7d38d-9130-49bc-b343-937c7c326353@intel.com> (raw)
In-Reply-To: <8343ad50-0bb3-4fed-a32b-a2b46db6c8b6@amd.com>
On 3/17/26 1:32 PM, Koralahalli Channabasappa, Smita wrote:
> On 3/16/2026 5:08 PM, Dave Jiang wrote:
>>
>>
>> On 3/16/26 1:19 PM, Smita Koralahalli wrote:
< -- snip -- >
>>> Fixes: 52cc48ad2a76 ("cxl/hdm: Limit emulation to the number of range registers")
>>> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
>>> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
>>
>> Smita,
>>
>> Applied to cxl/fixes
>> 75cea0776de5 cxl/hdm: Avoid incorrect DVSEC fallback when HDM decoders are enabled
>>
>> Any chance to add the issue reproduce steps to a regression test script in CXL CLI test please? Thanks!
>
> Thank you! Okay I will add it. That should be in ndctl/test?
Yes. Thanks!
prev parent reply other threads:[~2026-03-17 20:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 20:19 Smita Koralahalli
2026-03-17 0:08 ` Dave Jiang
2026-03-17 20:32 ` Koralahalli Channabasappa, Smita
2026-03-17 20:48 ` Dave Jiang [this message]
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