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smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=iyylqCIR; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52646606A326; Fri, 6 Nov 2026 12:16:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=iyylqCIR Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9785E1F0089F; Fri, 6 Nov 2026 12:15:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793967364; bh=GeKamPVoZL1FTnpLfPJEoUo6MPgLXcn6L2ctH3dFkr0=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=iyylqCIRzomWH2XFeQa6wTnmJI1ts49z3C5b+O/3nRHaqtfnGT97H35hFnhKoESO0 I3fgriaOvtxO/mwXkh+oI4qzkVUBVlcuZOylBTxX5zGvjjAgk6NeTX0zFPZ3LJXs3d RgTfg7eor3INyJgKdZl4u8LOHb27d4lfSHlhz0XgJ/AH1tKJulSSctmQj3c5Tg2C95 BJjJelPnzyf3cF4HVZNWMF3cNYm7oOR/JXeB+n/5znYa5t0ruakJF1/c+sQF3gisnx rZFigGUtXmJ1zy7cHyUMlRgBfuOodkq2W/uCxHhHPSASoG3Nkry+GPyQxexCY80xwB NQOnxbkiz8kFw== Message-ID: Date: Fri, 6 Nov 2026 13:15:56 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/5] dt-bindings: media: qcom,sm8150-camss: Add SM8150 CAMSS To: mail@andrewgigena.dev, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org References: <20261106-sm8150-v7.4-rc1-camss-v2-0-39ee37787b00@andrewgigena.dev> <20261106-sm8150-v7.4-rc1-camss-v2-2-39ee37787b00@andrewgigena.dev> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 06/11/2026 04:24, Andrew Gigena via B4 Relay wrote: > +--- > +$id: http://devicetree.org/schemas/media/qcom,sm8150-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM8150 Camera Subsystem (CAMSS) > + > +maintainers: > + - Andrew Gigena > + > +description: | Do not need '|' unless you need to preserve formatting. > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sm8150-camss > + Missing reg and reg-names. > + clocks: > + minItems: 27 > + maxItems: 27 > + > + clock-names: > + items: > + - const: camnoc_axi > + - const: cpas_ahb > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer > + - const: vfe0_axi > + - const: vfe0 > + - const: vfe0_cphy_rx > + - const: vfe0_csid > + - const: vfe1_axi > + - const: vfe1 > + - const: vfe1_cphy_rx > + - const: vfe1_csid > + - const: vfe_lite0 > + - const: vfe_lite0_cphy_rx > + - const: vfe_lite0_csid > + - const: vfe_lite1 > + - const: vfe_lite1_cphy_rx > + - const: vfe_lite1_csid > + - const: gcc_ahb > + - const: gcc_axi_hf > + - const: gcc_axi_sf > + > + interrupts: > + minItems: 12 > + maxItems: 12 > + > + interrupt-names: > + items: > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: csid0 > + - const: vfe1 > + - const: csid1 > + - const: vfe_lite0 > + - const: csid_lite0 > + - const: vfe_lite1 > + - const: csid_lite1 Which schema did you take as starting point / example? Which one has similar order? Looks quite different than sm8250 and sm8650. > + > + iommus: > + maxItems: 8 > + > + interconnects: > + maxItems: 4 > + > + interconnect-names: > + items: > + - const: cam_ahb > + - const: cam_hf_0_mnoc > + - const: cam_hf_1_mnoc hf_1 should probably go to the end, to match similar devices schemas. > + - const: cam_sf_0_mnoc > + > + power-domains: > + items: > + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: top > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data from CSIPHY0. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > + port@1: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data from CSIPHY1. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > + port@2: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data from CSIPHY2. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > + port@3: > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input port for receiving CSI data from CSIPHY3. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > + reg: > + minItems: 12 > + maxItems: 12 > + Oh, oddly placed reg. Please move it to the top as expected by DTS coding style. > + reg-names: > + items: > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: vfe0 > + - const: csid0 > + - const: vfe1 > + - const: csid1 > + - const: vfe_lite0 > + - const: csid_lite0 > + - const: vfe_lite1 > + - const: csid_lite1 > + > + vdda-phy-supply: > + description: > + 0.88V supply to CSIPHY IP blocks. > + > + vdda-pll-supply: > + description: > + 1.2V supply to CSIPHY IP blocks. > + > +required: > + - clock-names > + - clocks > + - compatible > + - interconnects > + - interconnect-names > + - interrupts > + - interrupt-names > + - iommus > + - power-domains > + - power-domain-names > + - reg > + - reg-names > + - vdda-phy-supply > + - vdda-pll-supply > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + #include > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + camss: camss@ac65000 { isp@ And drop unused label > + compatible = "qcom,sm8150-camss"; > + > + reg = <0 0xac65000 0 0x1000>, > + <0 0xac66000 0 0x1000>, > + <0 0xac67000 0 0x1000>, > + <0 0xac68000 0 0x1000>, > + <0 0xacaf000 0 0x4000>, > + <0 0xacb3000 0 0x1000>, > + <0 0xacb6000 0 0x4000>, > + <0 0xacba000 0 0x1000>, > + <0 0xacc4000 0 0x4000>, > + <0 0xacc8000 0 0x1000>, > + <0 0xaccb000 0 0x4000>, > + <0 0xaccf000 0 0x1000>; > + > + reg-names = "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", All this looks unaligned. Best regards, Krzysztof