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Tue, 27 Oct 2026 02:49:34 -0700 (PDT) Received: from [10.217.216.29] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8a36c0fdfefsm2076232b3a.50.2026.10.27.02.49.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2026 02:49:34 -0700 (PDT) Message-ID: Date: Tue, 27 Oct 2026 15:19:26 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] clk: qcom: dprxcc: Add Nord DPRX clock controller support To: Konrad Dybcio , Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Abel Vesa Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa References: <20260924-nords_dprx-v2-0-fa4364e087ef@oss.qualcomm.com> <20260924-nords_dprx-v2-3-fa4364e087ef@oss.qualcomm.com> <7a6ef006-cb76-4e4b-bd31-886af708b375@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <7a6ef006-cb76-4e4b-bd31-886af708b375@oss.qualcomm.com> Content-Type: text/plain; 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>> + regmap_write(regmap, dprx_1_dprx_cc_core_ahb_div_clk_src.reg, 0x0A); > Hex should be lowercase, but preferably please define some sort of a bitfield > that this value is written into and run regmap_update_bits() > > You should also set `.use_rpm = true` Will fix in the next patch. -- Thanks, Taniya Das