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b=o35bw4W6gcw18FYEr/vF4MZP9bxcE8mqlHkxufcd7ER3Dk9IuBcPmlAJwGh0+Omsm6WyWcGRH82yn5AOe2PHSByTAPvNcEW/qNx4sL14M2myC6w604ayNKTbamzk8ZPQwzdCajS5qKV4GsCZejr1awFnJGwem5Shon92GYA9gYI= Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Received: from VI0PR08MB10391.eurprd08.prod.outlook.com (2603:10a6:800:20c::6) by VI0PR08MB11842.eurprd08.prod.outlook.com (2603:10a6:800:316::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.10; Thu, 22 Jan 2026 11:36:57 +0000 Received: from VI0PR08MB10391.eurprd08.prod.outlook.com ([fe80::fa6b:9ba8:5c2f:ac91]) by VI0PR08MB10391.eurprd08.prod.outlook.com ([fe80::fa6b:9ba8:5c2f:ac91%4]) with mapi id 15.20.9542.009; Thu, 22 Jan 2026 11:36:57 +0000 Message-ID: Date: Thu, 22 Jan 2026 12:36:55 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 6/9] ACPI: CPPC: add APIs and sysfs interface for min/max_perf To: Sumit Gupta , rafael@kernel.org, viresh.kumar@linaro.org, zhenglifeng1@huawei.com, ionela.voinescu@arm.com, lenb@kernel.org, robert.moore@intel.com, corbet@lwn.net, rdunlap@infradead.org, ray.huang@amd.com, gautham.shenoy@amd.com, mario.limonciello@amd.com, perry.yuan@amd.com, zhanjie9@hisilicon.com, linux-pm@vger.kernel.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, acpica-devel@lists.linux.dev, linux-kernel@vger.kernel.org Cc: linux-tegra@vger.kernel.org, treding@nvidia.com, jonathanh@nvidia.com, vsethi@nvidia.com, ksitaraman@nvidia.com, sanjayc@nvidia.com, nhartman@nvidia.com, bbasu@nvidia.com References: <20260120145623.2959636-1-sumitg@nvidia.com> <20260120145623.2959636-7-sumitg@nvidia.com> Content-Language: en-US From: Pierre Gondois In-Reply-To: <20260120145623.2959636-7-sumitg@nvidia.com> Content-Type: text/plain; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jan 2026 11:38:00.7322 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 17584761-bffd-4157-cedc-08de59aab292 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF00039233.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB11091 On 1/20/26 15:56, Sumit Gupta wrote: > Add cppc_get/set_min_perf() and cppc_get/set_max_perf() APIs to read and > write the MIN_PERF and MAX_PERF registers. > > Also add sysfs interfaces (min_perf, max_perf) in cppc_cpufreq driver > to expose these controls to userspace. The sysfs values are in frequency > (kHz) for consistency with other cpufreq sysfs files. > > A mutex is used to serialize sysfs store operations to ensure hardware > register writes and perf_ctrls updates are atomic. > > Signed-off-by: Sumit Gupta > --- > drivers/acpi/cppc_acpi.c | 44 +++++++++ > drivers/cpufreq/cppc_cpufreq.c | 157 +++++++++++++++++++++++++++++++++ > include/acpi/cppc_acpi.h | 20 +++++ > 3 files changed, 221 insertions(+) > > diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c > index 45c6bd6ec24b..46bf45f8b0f3 100644 > --- a/drivers/acpi/cppc_acpi.c > +++ b/drivers/acpi/cppc_acpi.c > @@ -1743,6 +1743,50 @@ int cppc_set_auto_sel(int cpu, bool enable) > } > EXPORT_SYMBOL_GPL(cppc_set_auto_sel); > > +/** > + * cppc_get_min_perf - Read minimum performance register. > + * @cpu: CPU from which to read register. > + * @min_perf: Return address. > + */ > +int cppc_get_min_perf(int cpu, u64 *min_perf) > +{ > + return cppc_get_reg_val(cpu, MIN_PERF, min_perf); > +} > +EXPORT_SYMBOL_GPL(cppc_get_min_perf); > + > +/** > + * cppc_set_min_perf - Write minimum performance register. > + * @cpu: CPU to which to write register. > + * @min_perf: the desired minimum performance value to be updated. > + */ > +int cppc_set_min_perf(int cpu, u32 min_perf) > +{ > + return cppc_set_reg_val(cpu, MIN_PERF, min_perf); > +} > +EXPORT_SYMBOL_GPL(cppc_set_min_perf); > + > +/** > + * cppc_get_max_perf - Read maximum performance register. > + * @cpu: CPU from which to read register. > + * @max_perf: Return address. > + */ > +int cppc_get_max_perf(int cpu, u64 *max_perf) > +{ > + return cppc_get_reg_val(cpu, MAX_PERF, max_perf); > +} > +EXPORT_SYMBOL_GPL(cppc_get_max_perf); > + > +/** > + * cppc_set_max_perf - Write maximum performance register. > + * @cpu: CPU to which to write register. > + * @max_perf: the desired maximum performance value to be updated. > + */ > +int cppc_set_max_perf(int cpu, u32 max_perf) > +{ > + return cppc_set_reg_val(cpu, MAX_PERF, max_perf); > +} > +EXPORT_SYMBOL_GPL(cppc_set_max_perf); > + > /** > * cppc_set_enable - Set to enable CPPC on the processor by writing the > * Continuous Performance Control package EnableRegister field. > diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c > index 229880c4eedb..66e183b45fb0 100644 > --- a/drivers/cpufreq/cppc_cpufreq.c > +++ b/drivers/cpufreq/cppc_cpufreq.c > @@ -28,6 +28,8 @@ > > static struct cpufreq_driver cppc_cpufreq_driver; > > +static DEFINE_MUTEX(cppc_cpufreq_autonomous_lock); > + Shouldn't concurrent access be handled by the policy->rwsem ? I think this can be checked using either: - lockdep_assert_held_write(&policy->rwsem) - lockdep_assert_held_read(&policy->rwsem) in store/show_max_perf() for instance. > #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE > static enum { > FIE_UNSET = -1, > @@ -570,6 +572,35 @@ static void populate_efficiency_class(void) > } > #endif > > +/* Set min/max performance HW register and cache the value */ > +static int cppc_cpufreq_set_mperf_reg(struct cpufreq_policy *policy, > + u64 val, bool is_min) > +{ > + struct cppc_cpudata *cpu_data = policy->driver_data; > + struct cppc_perf_caps *caps = &cpu_data->perf_caps; > + unsigned int cpu = policy->cpu; > + u32 perf; > + int ret; > + > + perf = clamp(val, caps->lowest_perf, caps->highest_perf); > + > + ret = is_min ? cppc_set_min_perf(cpu, perf) : > + cppc_set_max_perf(cpu, perf); > + if (ret) { > + if (ret != -EOPNOTSUPP) > + pr_warn("CPU%d: set %s_perf=%u failed (%d)\n", > + cpu, is_min ? "min" : "max", perf, ret); > + return ret; > + } > + > + if (is_min) > + cpu_data->perf_ctrls.min_perf = perf; > + else > + cpu_data->perf_ctrls.max_perf = perf; > + > + return 0; > +} > + > static struct cppc_cpudata *cppc_cpufreq_get_cpu_data(unsigned int cpu) > { > struct cppc_cpudata *cpu_data; > @@ -918,16 +949,142 @@ CPPC_CPUFREQ_ATTR_RW_U64(auto_act_window, cppc_get_auto_act_window, > CPPC_CPUFREQ_ATTR_RW_U64(energy_performance_preference_val, > cppc_get_epp_perf, cppc_set_epp) > > +/** > + * show_min_perf - Show minimum performance as frequency (kHz) > + * @policy: cpufreq policy > + * @buf: buffer to write the frequency value to > + * > + * Reads the MIN_PERF register and converts the performance value to > + * frequency (kHz). > + */ > +static ssize_t show_min_perf(struct cpufreq_policy *policy, char *buf) > +{ > + struct cppc_cpudata *cpu_data = policy->driver_data; > + struct cppc_perf_caps *caps = &cpu_data->perf_caps; > + u64 perf; > + int ret; > + > + ret = cppc_get_min_perf(policy->cpu, &perf); > + if (ret == -EOPNOTSUPP) > + return sysfs_emit(buf, "\n"); > + if (ret) > + return ret; > + > + /* Use lowest_perf if register is uninitialized (0) */ > + if (perf == 0) > + perf = caps->lowest_perf; > + > + /* Convert performance to frequency (kHz) for user */ > + return sysfs_emit(buf, "%u\n", cppc_perf_to_khz(caps, perf)); > +} > + > +/** > + * store_min_perf - Set minimum performance from frequency (kHz) > + * @policy: cpufreq policy > + * @buf: buffer containing the frequency value > + * @count: size of @buf > + * > + * Converts the user-provided frequency (kHz) to a performance value > + * and writes it to the MIN_PERF register. > + */ > +static ssize_t store_min_perf(struct cpufreq_policy *policy, const char *buf, > + size_t count) > +{ > + struct cppc_cpudata *cpu_data = policy->driver_data; > + unsigned int freq_khz; > + u64 perf; > + int ret; > + > + ret = kstrtouint(buf, 0, &freq_khz); > + if (ret) > + return ret; > + > + /* Convert frequency (kHz) to performance value */ > + perf = cppc_khz_to_perf(&cpu_data->perf_caps, freq_khz); > + > + guard(mutex)(&cppc_cpufreq_autonomous_lock); > + ret = cppc_cpufreq_set_mperf_reg(policy, perf, true); > + if (ret) > + return ret; > + > + return count; > +} > + > +/** > + * show_max_perf - Show maximum performance as frequency (kHz) > + * @policy: cpufreq policy > + * @buf: buffer to write the frequency value to > + * > + * Reads the MAX_PERF register and converts the performance value to > + * frequency (kHz). > + */ > +static ssize_t show_max_perf(struct cpufreq_policy *policy, char *buf) > +{ > + struct cppc_cpudata *cpu_data = policy->driver_data; > + struct cppc_perf_caps *caps = &cpu_data->perf_caps; > + u64 perf; > + int ret; > + > + ret = cppc_get_max_perf(policy->cpu, &perf); > + if (ret == -EOPNOTSUPP) > + return sysfs_emit(buf, "\n"); > + if (ret) > + return ret; > + > + /* Use highest_perf if register is uninitialized or out of range */ > + if (perf == 0 || perf > caps->highest_perf) > + perf = caps->highest_perf; > + > + /* Convert performance to frequency (kHz) for user */ > + return sysfs_emit(buf, "%u\n", cppc_perf_to_khz(caps, perf)); > +} > + > +/** > + * store_max_perf - Set maximum performance from frequency (kHz) > + * @policy: cpufreq policy > + * @buf: buffer containing the frequency value > + * @count: size of @buf > + * > + * Converts the user-provided frequency (kHz) to a performance value > + * and writes it to the MAX_PERF register. > + */ > +static ssize_t store_max_perf(struct cpufreq_policy *policy, const char *buf, > + size_t count) > +{ > + struct cppc_cpudata *cpu_data = policy->driver_data; > + unsigned int freq_khz; > + u64 perf; > + int ret; > + > + ret = kstrtouint(buf, 0, &freq_khz); > + if (ret) > + return ret; > + > + /* Convert frequency (kHz) to performance value */ > + perf = cppc_khz_to_perf(&cpu_data->perf_caps, freq_khz); > + > + guard(mutex)(&cppc_cpufreq_autonomous_lock); > + ret = cppc_cpufreq_set_mperf_reg(policy, perf, false); > + if (ret) > + return ret; > + > + return count; > +} > + > cpufreq_freq_attr_ro(freqdomain_cpus); > cpufreq_freq_attr_rw(auto_select); > cpufreq_freq_attr_rw(auto_act_window); > cpufreq_freq_attr_rw(energy_performance_preference_val); > +cpufreq_freq_attr_rw(min_perf); > +cpufreq_freq_attr_rw(max_perf); > > static struct freq_attr *cppc_cpufreq_attr[] = { > &freqdomain_cpus, > &auto_select, > &auto_act_window, > &energy_performance_preference_val, > + &min_perf, > + &max_perf, > NULL, > }; > > diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h > index 3fc796c0d902..b358440cd0e2 100644 > --- a/include/acpi/cppc_acpi.h > +++ b/include/acpi/cppc_acpi.h > @@ -174,6 +174,10 @@ extern int cppc_get_auto_act_window(int cpu, u64 *auto_act_window); > extern int cppc_set_auto_act_window(int cpu, u64 auto_act_window); > extern int cppc_get_auto_sel(int cpu, bool *enable); > extern int cppc_set_auto_sel(int cpu, bool enable); > +extern int cppc_get_min_perf(int cpu, u64 *min_perf); > +extern int cppc_set_min_perf(int cpu, u32 min_perf); > +extern int cppc_get_max_perf(int cpu, u64 *max_perf); > +extern int cppc_set_max_perf(int cpu, u32 max_perf); > extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); > extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); > extern int amd_detect_prefcore(bool *detected); > @@ -270,6 +274,22 @@ static inline int cppc_set_auto_sel(int cpu, bool enable) > { > return -EOPNOTSUPP; > } > +static inline int cppc_get_min_perf(int cpu, u64 *min_perf) > +{ > + return -EOPNOTSUPP; > +} > +static inline int cppc_set_min_perf(int cpu, u32 min_perf) > +{ > + return -EOPNOTSUPP; > +} > +static inline int cppc_get_max_perf(int cpu, u64 *max_perf) > +{ > + return -EOPNOTSUPP; > +} > +static inline int cppc_set_max_perf(int cpu, u32 max_perf) > +{ > + return -EOPNOTSUPP; > +} > static inline int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) > { > return -ENODEV;