From: <Claudiu.Beznea@microchip.com>
To: <michael@walle.cc>, <Kavyasree.Kotagiri@microchip.com>,
<Nicolas.Ferre@microchip.com>
Cc: <arnd@arndb.de>, <olof@lixom.net>, <soc@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski@canonical.com>,
<alexandre.belloni@bootlin.com>
Subject: Re: [PATCH v1 4/6] ARM: dts: lan966x: add flexcom SPI nodes
Date: Fri, 4 Mar 2022 08:30:41 +0000 [thread overview]
Message-ID: <b69dac52-335d-539a-369a-6614f9eeb61a@microchip.com> (raw)
In-Reply-To: <20220303160323.3316317-5-michael@walle.cc>
On 03.03.2022 18:03, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add all the SPI nodes for the flexcom IP block. Keep them
> disabled by default.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 75 ++++++++++++++++++++++++++++++++++
> 1 file changed, 75 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index bea69b6d2749..0616927f1bb1 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -105,6 +105,21 @@ usart0: serial@200 {
> atmel,fifo-size = <32>;
> status = "disabled";
> };
> +
> + spi0: spi@400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
try to keep the:
- compatible
- reg
first as all the other nodes in this DT. It would be simple to follow.
> + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
> + <&dma0 AT91_XDMAC_DT_PERID(2)>;
Align dma entries. Same for the rest of nodes added.
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "spi_clk";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> flx1: flexcom@e0044000 {
> @@ -128,6 +143,21 @@ usart1: serial@200 {
> atmel,fifo-size = <32>;
> status = "disabled";
> };
> +
> + spi1: spi@400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
> + <&dma0 AT91_XDMAC_DT_PERID(4)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "spi_clk";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> trng: rng@e0048000 {
> @@ -168,6 +198,21 @@ usart2: serial@200 {
> atmel,fifo-size = <32>;
> status = "disabled";
> };
> +
> + spi2: spi@400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
> + <&dma0 AT91_XDMAC_DT_PERID(6)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "spi_clk";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> flx3: flexcom@e0064000 {
> @@ -191,6 +236,21 @@ usart3: serial@200 {
> atmel,fifo-size = <32>;
> status = "disabled";
> };
> +
> + spi3: spi@400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
> + <&dma0 AT91_XDMAC_DT_PERID(8)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "spi_clk";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> dma0: dma-controller@e0068000 {
> @@ -233,6 +293,21 @@ usart4: serial@200 {
> atmel,fifo-size = <32>;
> status = "disabled";
> };
> +
> + spi4: spi@400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
> + <&dma0 AT91_XDMAC_DT_PERID(10)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "spi_clk";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> timer0: timer@e008c000 {
> --
> 2.30.2
>
next prev parent reply other threads:[~2022-03-04 8:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-03 16:03 [PATCH v1 0/6] ARM: dts: lan966x: dtsi improvements and KSwitch D10 support Michael Walle
2022-03-03 16:03 ` [PATCH v1 1/6] ARM: dts: lan966x: swap dma channels for crypto node Michael Walle
2022-03-04 8:21 ` Claudiu.Beznea
2022-03-03 16:03 ` [PATCH v1 2/6] ARM: dts: lan966x: add sgpio node Michael Walle
2022-03-04 8:24 ` Claudiu.Beznea
2022-03-03 16:03 ` [PATCH v1 3/6] ARM: dts: lan966x: add all flexcom usart nodes Michael Walle
2022-03-04 8:30 ` Claudiu.Beznea
2022-03-04 11:01 ` Michael Walle
2022-03-07 11:53 ` Claudiu.Beznea
2022-03-07 12:04 ` Michael Walle
2022-03-18 12:17 ` Claudiu.Beznea
2022-03-22 21:39 ` Michael Walle
2022-03-24 16:32 ` Claudiu.Beznea
2022-03-03 16:03 ` [PATCH v1 4/6] ARM: dts: lan966x: add flexcom SPI nodes Michael Walle
2022-03-04 8:30 ` Claudiu.Beznea [this message]
2022-03-03 16:03 ` [PATCH v1 5/6] ARM: dts: lan966x: add flexcom I2C nodes Michael Walle
2022-03-03 16:03 ` [PATCH v1 6/6] ARM: dts: lan966x: add basic Kontron KSwitch D10 support Michael Walle
2022-03-04 8:31 ` Claudiu.Beznea
2022-03-04 11:15 ` Michael Walle
2022-03-07 12:07 ` Claudiu.Beznea
2022-03-07 12:17 ` Michael Walle
2022-03-18 12:26 ` Claudiu.Beznea
2022-03-23 8:06 ` Tudor.Ambarus
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