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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI1MDA3MSBTYWx0ZWRfXwmGapZsKeSV7 x78k8ePRqQbrwlFBL3OjITwGKv3l7KJltxsTn7ADzvCLWoKog5gPrJfIkB/gI4Z8kOKFoTgsc6S UPLNfVJc98jrkuyEPjHFdTRiNcXXCKBjCQMhE2NVYu3VAhIJunGrw4dV2MH+fjMao7CeoYem9Ko huhzNFRKqkl/E2ne2WMO/cc6Lb+4N5Xr3OriRy/fscUJZEh8vd/bg/IPvyBQ5jrSMppALBYYxSg KSZ0vmAmiZ2BJ9WEWTtDqedCAGVRiVAktTEB9NdytRlb/RAvxxkGXpkiEMa/GK3kBcvdcIjHi9d KTb9FwROYKpRYnxrP74yxs3T7rr0x6Kwp5K3Zqo61hgnfLHkQrDoBADSD9BJOlMYTFwG1qLof3L 7a8XXp0S+DBZwYb75mwWvQvOY7W1C3vgwrlWym6U2LE+nIv3FLatfVrJVAZ3ULk1QDwDHZVYMEG WDLfSNG6/tjpvKqzW9Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwODI1MDA3MSBTYWx0ZWRfX9+G0MCXgWDOP sqAHD+CGain58zl8u2CDkXZsss4ESCoBl3llpYEFU3a7XHZJauJnNuFzgp1bbWICGFA9I4nruWV ypvqnE+hafwAzFTZhzgDDvuPQR+IZiY= X-Proofpoint-ORIG-GUID: cx9UStNVXXqh0inGfT6-zvFdSqhs8hcD X-Proofpoint-GUID: cx9UStNVXXqh0inGfT6-zvFdSqhs8hcD X-Authority-Analysis: v=2.4 cv=QIlYgALL c=1 sm=1 tr=0 ts=6a8d52a7 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=-6rRdagTYtbFvggOUc8A:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-25_02,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608250071 On 8/25/26 8:28 AM, Yongxing Mou wrote: > > > On 8/17/2026 10:14 PM, Konrad Dybcio wrote: >> On 8/17/26 4:13 PM, Konrad Dybcio wrote: >>> On 8/13/26 9:44 AM, Yongxing Mou wrote: >>>> >>>> >>>> On 7/20/2026 4:49 PM, Konrad Dybcio wrote: >>>>> On 7/20/26 10:43 AM, Yongxing Mou wrote: >>>>>> Kaanapali (SM8750) and Glymur use two display power domains. >>>>>> CORE_GDSC powers the main display hardware while INT2_GDSC >>>>>> powers a subset of SSPP blocks. >>>>> >>>>> Can they operate independently? Does INT2_GDSC need to be >>>>> powered on after CORE_GDSC? >>>>> >>>> On Kaanapali, my understanding is that CORE_GDSC and INT2_GDSC should generally track the same state, except that INT2_GDSC may be powered down when SSPP1 (VIG2/VIG3/DMA5) is unused. >>> >>> Is the MDSS any useful if *only* INT2_GDSC is enabled? Can the INT2_GDSC >>> be enabled itself if CORE_GDSC is off? >> >> (I didn't quite know how to parse the list of states you provided in your >> reply so I asked again) >> >> Konrad > Hi, Konard. Would you recommend adding the parent clock in the clock driver, or handling 2 GDSC in the display driver? I'm preparing the next revision and would appreciate your feedback. Does disabling INT2 provide us with any power benefits and will the display driver do the accounting for what resources need the INT2 GDSC specifically? Konrad