From: Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: "Joerg Roedel (AMD)" <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Prakash Gupta <prakash.gupta@oss.qualcomm.com>
Subject: Re: [PATCH] iommu/io-pgtable-arm: Add support for contiguous hint bit
Date: Wed, 15 Jul 2026 11:25:42 +0530 [thread overview]
Message-ID: <b7224dff-7e51-49cb-8421-14d090492dfc@oss.qualcomm.com> (raw)
In-Reply-To: <20260703161228.GA1948451@nvidia.com>
On 7/3/2026 9:42 PM, Jason Gunthorpe wrote:
> On Thu, Jun 18, 2026 at 02:32:09PM +0530, Vijayanand Jitta wrote:
>> From: Prakash Gupta <prakash.gupta@oss.qualcomm.com>
>>
>> Add support for the contiguous hint (CONT) bit in ARM LPAE page tables.
>> When a set of consecutive PTEs map a naturally-aligned contiguous block
>> of memory, the CONT bit can be set on all entries in the group to allow
>> the hardware to combine them into a single TLB entry, improving TLB
>> utilization.
>>
>> The contiguous hint sizes per granule are:
>>
>> Page Size | CONT PTE | PMD | CONT PMD
>> ----------+----------+-------+---------
>> 4K | 64K | 2M | 32M
>> 16K | 2M | 32M | 1G
>> 64K | 2M | 512M | 16G
>
> My series to convert smmuv3 to the iommupt takes care of this and
> supports all the orders too. I'd rather we move forward with that then
> try to patch up this.
>
Thanks for details, I have gone through your series. As this patch
targets io-pgtable-arm.c directly and would benefit all its users (SMMUv2,
Apple DART, etc.), not just SMMUv3. I think there will still be value in
this patch for the other users.
>> Support is gated behind CONFIG_IOMMU_IO_PGTABLE_CONTIG_HINT, which
>> provides a compile-time opt-out for hardware affected by SMMU errata
>> related to the contiguous bit.
>
> I reviewed the errata and didn't find any related to contig that
> required disabling contig, the driver was OK with the ones I
> found.. Did you find something specific?
>
>> On the unmapping side, the CONT bit is cleared from all PTEs in the
>> affected contiguous group before any individual entry is invalidated,
>> following the Break-Before-Make requirement of the architecture.
>
> BBM means you make it non-present and flush, it doesn't mean you clear
> CONT, this is wrong..
>
> Jason
You're right. The arm_lpae_cont_clear() step was introduced to support
partial unmaps of a contiguous group — clearing CONT first so that
individual entries could then be invalidated one by one. However, as
Daniel also pointed out, partial unmap of a contiguous group should not
be supported at all. Since v2 will enforce that an unmap must exactly
match the full aligned contiguous range, arm_lpae_cont_clear() is no
longer needed and will be removed. The unmap path will simply write
invalid entries for all PTEs in the contiguous group and issue a single
range TLB flush covering the entire range thereby following BBM.
Thanks,
Vijay
next prev parent reply other threads:[~2026-07-15 5:55 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 9:02 Vijayanand Jitta
2026-06-19 19:40 ` Daniel Mentz
2026-06-25 5:47 ` Vijayanand Jitta
2026-07-03 16:12 ` Jason Gunthorpe
2026-07-07 23:04 ` Daniel Mentz
2026-07-07 23:58 ` Jason Gunthorpe
2026-07-15 5:55 ` Vijayanand Jitta [this message]
2026-07-15 11:39 ` Jason Gunthorpe
2026-07-15 12:03 ` Will Deacon
2026-07-15 12:14 ` Robin Murphy
2026-07-15 12:50 ` Jason Gunthorpe
2026-07-15 17:45 ` Robin Murphy
2026-07-15 18:09 ` Jason Gunthorpe
2026-07-16 11:59 ` Robin Murphy
2026-07-15 12:28 ` Jason Gunthorpe
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