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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA1MCBTYWx0ZWRfX8jox+e7vQw2J j4ckvhtt3+AylmV0clIapaBfITPsvBWMkYvqDmsCzo0KJrTp+GareaUh2Ub4nvGe7tDvmYBIOHK +ds8+KQ35nQBkUoXkwdQMLRUVyTsrFjCenvroHf/3x9WGhMcA1CZaJfHvz3VM4hA9ELHEMDQ8ie xbrMhC260i/OknpPOUntRgT4oUS5v4ERPAPD3ipEqcOXE7rZHvaXteJXxezvNcA6Y03qUyvyG2c qIPghwN4IS3wdjk435QZ1TFMh6cXr6jmmbS3DyiI6Gv+wA27UMxl9Obq41OQYYxqt003Rm3gVw4 Txp24GJrhN8zgx7rMb/e9HZ/+dBNTXvOiAB01ksmiWBgaE8Equ6HXw//eWAWktAI4R/0ceyrnDV YTixYZ/4E1rSq5siYL+pdQXIuQ8X6ijEsWkZSIenHLHH5b3LYiWq2ciIZEbtMs2TEiCCyhtMfuL s++Po6RptswoggzG7Og== X-Authority-Analysis: v=2.4 cv=O780fR9W c=1 sm=1 tr=0 ts=69a135af cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=AmzfQV_qY4rmN1R1o4MA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-ORIG-GUID: 9vKMnFft5vWSS1bl7-n0P8S1qo1Jg4oS X-Proofpoint-GUID: 9vKMnFft5vWSS1bl7-n0P8S1qo1Jg4oS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602270050 Hi, On 2/23/2026 8:29 PM, Krzysztof Kozlowski wrote: > On 23/02/2026 11:05, Md Sadre Alam wrote: >> Remove eMMC support from the IPQ5424 RDP466 board configuration to >> resolve GPIO pin conflicts with SPI NAND interface. >> >> The IPQ5424 RDP466 board is designed with NOR + NAND as the default boot >> mode configuration. The eMMC controller and SPI NAND controller share >> the same GPIO pins, creating a hardware conflict: > > This *MUST* be squashed. If it conflicts then your previous patch was > not correct. I will squash the patches and update this in the next revision Thanks, Alam.