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Wed, 15 Apr 2026 14:17:55 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , Subject: [PATCH rc v2 4/5] iommu/arm-smmu-v3: Skip EVTQ/PRIQ setup in kdump kernel Date: Wed, 15 Apr 2026 14:17:39 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C6184:EE_|SJ2PR12MB9210:EE_ X-MS-Office365-Filtering-Correlation-Id: 66af1474-2507-4665-2a9d-08de9b348144 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|36860700016|82310400026|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: 0TuC2oOSFn9GRnBN32Uaq+CXfYY4Y+ssTEbPjMzDpFyJ0u+1L7PaDqrGZX2/brvOvguMWJw9h45qrcolMiOtT4FeiR+R/D+sey9MpkwpgePz3SrKgFpfpUHTZQJy+V7FPZEJvZyVrn3uNf3342A1gyv0xQXDjZDRGjHubPtpl3VYnUwv6mVgzEDUf7TcR0ikYa+x8v8WiA5s8qnzapz5gavuiBwzuaZUY2GBV3R5x/vBhMXaXAZjd0LrJMZwSfa+U6+FGxD10AzkJLCHl+8ux3BhSSacz1QYiMg3gycH7AP7oLeCKV1K+9ZkV3UligRcUO16Ysf+nsyAW04mSUHiglEh2/AFLBmepY/nNQmgEx5l0Ppvt3HtaTOOHE4LG5K5h09MkjIY5SDux9Bj8niPIHOSuZtgGJHxrzlYJ0q6qmmLwhzwaMXmVM+3nyNsJ5be+cIrPTWn1Ejvj7gYTec3q4KnLBC6/4JbrJqarVufprPeKUqY6jfA6hu3+Ln1IT0Q0GQwBXNCRFbSd2ni1t8qSsQWEQoMRYBbtJ/xbQL41szebgMvN4Rkls/73W2uu0Yvd/XWUCJ+9PwNhwpHgUHuA3aHxf9MWt0OB7ezbr54lAxFYhkwE+bjN/uwWUOh91VUB2DkSfFUc2Bg9Jq51khT1VDmcRmMQ2Z81hngc7P3SH66GXlqRCEyiJ4DHuOlNhrIJXA54sOTCCgpc6pb53erwMZTSrfM2EY6QOiRf4dKrOOw3LGH3wVQfKIXK6gvvfaI9yGomzMhi9vS8dD4el+bhA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(36860700016)(82310400026)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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Also, we cannot serve page requests. Skip the EVTQ/PRIQ setup entirely rather than enabling then disabling them. Also add some inline comments explaining that. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 43 +++++++++++++-------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b2c34713bf9f2..12cd148a99dc6 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5023,21 +5023,35 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) cmd.opcode = CMDQ_OP_TLBI_NSNH_ALL; arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); - /* Event queue */ - writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); - writel_relaxed(smmu->evtq.q.llq.prod, smmu->page1 + ARM_SMMU_EVTQ_PROD); - writel_relaxed(smmu->evtq.q.llq.cons, smmu->page1 + ARM_SMMU_EVTQ_CONS); - - enables |= CR0_EVTQEN; - ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, - ARM_SMMU_CR0ACK); - if (ret) { - dev_err(smmu->dev, "failed to enable event queue\n"); - return ret; + /* + * Event queue + * + * Do not enable in a kdump case, as the crashed kernel's CDs and page + * tables might be corrupted, triggering event spamming. + */ + if (!is_kdump_kernel()) { + writeq_relaxed(smmu->evtq.q.q_base, + smmu->base + ARM_SMMU_EVTQ_BASE); + writel_relaxed(smmu->evtq.q.llq.prod, + smmu->page1 + ARM_SMMU_EVTQ_PROD); + writel_relaxed(smmu->evtq.q.llq.cons, + smmu->page1 + ARM_SMMU_EVTQ_CONS); + + enables |= CR0_EVTQEN; + ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to enable event queue\n"); + return ret; + } } - /* PRI queue */ - if (smmu->features & ARM_SMMU_FEAT_PRI) { + /* + * PRI queue + * + * Do not enable in a kdump case, as we cannot serve page requests. + */ + if (!is_kdump_kernel() && (smmu->features & ARM_SMMU_FEAT_PRI)) { writeq_relaxed(smmu->priq.q.q_base, smmu->base + ARM_SMMU_PRIQ_BASE); writel_relaxed(smmu->priq.q.llq.prod, @@ -5070,9 +5084,6 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) return ret; } - if (is_kdump_kernel()) - enables &= ~(CR0_EVTQEN | CR0_PRIQEN); - /* Enable the SMMU interface */ enables |= CR0_SMMUEN; ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, -- 2.43.0