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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id c12-20020a05600c0a4c00b00381141f4967sm10016714wmq.35.2022.03.02.11.31.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Mar 2022 11:31:20 -0800 (PST) Message-ID: Date: Wed, 2 Mar 2022 20:31:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [Patch v4 2/4] dt-bindings: memory: Update reg maxitems for tegra186 Content-Language: en-US To: Rob Herring , Ashish Mhetre Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, vdumpa@nvidia.com, Snikam@nvidia.com References: <1646210609-21943-1-git-send-email-amhetre@nvidia.com> <1646210609-21943-3-git-send-email-amhetre@nvidia.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/03/2022 18:51, Rob Herring wrote: > On Wed, Mar 02, 2022 at 02:13:27PM +0530, Ashish Mhetre wrote: >> >From tegra186 onwards, memory controller support multiple channels. >> Reg items are updated with address and size of these channels. >> Tegra186 has overall 5 memory controller channels. Tegra194 and tegra234 >> have overall 17 memory controller channels each. >> There is 1 reg item for memory controller stream-id registers. >> So update the reg maxItems to 18 in tegra186 devicetree documentation. > > Some of this needs to be in 'description' for 'reg'. > >> >> Signed-off-by: Ashish Mhetre >> --- >> .../devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >> index 13c4c82..eb7ed00 100644 >> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >> @@ -35,7 +35,7 @@ properties: >> >> reg: >> minItems: 1 >> - maxItems: 3 >> + maxItems: 18 >> ...and with "if:" block constraining these on different hardware. Best regards, Krzysztof