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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/11/2026 14:43, Patrice CHOTARD wrote: > > > On 10/17/26 19:52, Krzysztof Kozlowski wrote: >> On Fri, Oct 16, 2026 at 05:26:04PM +0200, Patrice Chotard wrote: >>> The STM32 TAMP node (compatible "st,stm32-tamp", "syscon", "simple-mfd") >>> exposes its backup registers through an nvram child node described by >>> nvmem/st,stm32-tamp-nvram.yaml. That requires the TAMP node to carry >>> "#address-cells", "#size-cells", "ranges" and an "nvram@..." child. >>> >>> st,stm32-syscon.yaml uses "additionalProperties: false" and only allowed >>> reg/clocks/#clock-cells, so wiring the nvram provider into the DTSI made >>> "make dtbs_check" fail on every STM32MP TAMP node: >>> >>> tamp@5c00a000 (st,stm32-tamp): '#address-cells', '#size-cells', >>> 'nvram@5c00a100', 'ranges' do not match any of the regexes: >>> '^pinctrl-[0-9]+$' >> >> There are no children of tamp@5c00a000 in >> arch/arm/boot/dts/st/stm32mp151.dtsi. How is it possible to reproduce >> this warning? >> >> Are you using some other patches bugs as a reason of change in bindings? > > Hi Krzysztof > > yes, in this patch [1] arch/arm/boot/dts/st/stm32mp151.dtsi is updated > that's why bindings need this change. You cannot use future code as a bug being fixed. Best regards, Krzysztof