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From: "Michael S. Tsirkin" <mst@redhat.com>
To: x86@kernel.org, kvm@vger.kernel.org
Cc: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Avi Kivity <avi@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	gleb@redhat.com, Linus Torvalds <torvalds@linux-foundation.org>,
	linux-kernel@vger.kernel.org,
	Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCHv6 1/8] kvm: document lapic regs field
Date: Sun, 3 Jun 2012 10:27:53 +0300	[thread overview]
Message-ID: <b85d91d1e48a7c7531ba07075d81bb18bfdb00c1.1338474301.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1338474301.git.mst@redhat.com>

The logic in find_highest_vector looks
strange until you realize the reason for the
weird memory layout, which is because this is
what the CPU microcode expects.

Add a comment so this stops tripping people up.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 arch/x86/kvm/lapic.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 6f4ce25..d29da25 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -13,6 +13,11 @@ struct kvm_lapic {
 	u32 divide_count;
 	struct kvm_vcpu *vcpu;
 	bool irr_pending;
+	/**
+	 * APIC register page.  The layout matches the register layout seen by
+	 * the guest 1:1, because it is accessed by the vmx microcode.
+	 * Note: Only one register, the TPR, is used by the microcode.
+	 */
 	void *regs;
 	gpa_t vapic_addr;
 	struct page *vapic_page;
-- 
MST


  reply	other threads:[~2012-06-03  7:28 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-03  7:27 [PATCHv6 0/8] kvm: eoi optimization support Michael S. Tsirkin
2012-06-03  7:27 ` Michael S. Tsirkin [this message]
2012-06-03  7:27 ` [PATCHv6 2/8] kvm: optimize ISR lookups Michael S. Tsirkin
2012-06-12 21:08   ` Marcelo Tosatti
2012-06-13  9:02     ` Michael S. Tsirkin
2012-06-13  9:26       ` Michael S. Tsirkin
2012-06-13 20:21       ` Marcelo Tosatti
2012-06-03  7:28 ` [PATCHv6 3/8] kvm_para: guest side for eoi avoidance Michael S. Tsirkin
2012-06-03  7:28 ` [PATCHv6 4/8] x86/bitops: note on __test_and_clear_bit atomicity Michael S. Tsirkin
2012-06-03  7:28 ` [PATCHv6 5/8] kvm: eoi msi documentation Michael S. Tsirkin
2012-06-12 22:24   ` Marcelo Tosatti
2012-06-03  7:28 ` [PATCHv6 6/8] kvm: only sync when attention bits set Michael S. Tsirkin
2012-06-12 22:27   ` Marcelo Tosatti
2012-06-13  8:19     ` Michael S. Tsirkin
2012-06-13  8:35       ` Michael S. Tsirkin
2012-06-13 20:53         ` Marcelo Tosatti
2012-06-13 21:04           ` Michael S. Tsirkin
2012-06-13 23:38             ` Marcelo Tosatti
2012-06-14  8:04               ` Michael S. Tsirkin
2012-06-03  7:28 ` [PATCHv6 7/8] kvm: rearrange injection cancelling code Michael S. Tsirkin
2012-06-03  7:28 ` [PATCHv6 8/8] kvm: host side for eoi optimization Michael S. Tsirkin
2012-06-13 21:10   ` Marcelo Tosatti
2012-06-14  8:01     ` Michael S. Tsirkin

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