Re: [PATCH v1 2/3] i3c: master: Add Qualcomm I3C master controller driver

[Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>]

Thanks a lot Rob ! sorry, i was late to respond on this while waiting 
for other comments agreements.

On 2/12/2025 3:11 AM, Rob Herring wrote:
> On Mon, Feb 10, 2025 at 09:41:28PM +0530, Mukesh Kumar Savaliya wrote:
>> Thanks Krzysztof !
>>
>> On 2/9/2025 5:10 PM, Krzysztof Kozlowski wrote:
>>> On 07/02/2025 13:03, Mukesh Kumar Savaliya wrote:
>>>>>> +	gi3c->se.clk = devm_clk_get(&pdev->dev, "se-clk");
>>>>>> +	if (IS_ERR(gi3c->se.clk)) {
>>>>>> +		ret = PTR_ERR(gi3c->se.clk);
>>>>>> +		dev_err(&pdev->dev, "Error getting SE Core clk %d\n", ret);
>>>>>> +		return ret;
>>>>>> +	}
>>>>>> +
>>>>>> +	ret = device_property_read_u32(&pdev->dev, "se-clock-frequency", &gi3c->clk_src_freq);
>>>>>
>>>>> You never tested your DTS or this code... Drop
>>>>>
>>>> I have tested on SM8550 MTP only. Below entry in my internal/local DTSI.
>>>
>>>
>>> And how is it supposed to work? Are you going to send us your local
>>> internal DTSI? Is it going to pass any checks?
>> was saying about code was testing with MTP. DTS was tested using dt-bindings
>> check.
> 
> make dtbs_check is how you test.
Sure, we are running "make dt_binding_check 
DT_SCHEMA_FILES=qcom,i3c-master.yaml"
> 
>> I should add "se-clock-frequency" and "dfs-index"
> 
> No. We already have standard clock properties and we don't put indexes
> into DT.
> 
Okay, sure Rob. I shall remove both of these and set internally within 
driver as they can be set to default.
> Rob