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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5ca0b0f977csm1643733a12.83.2024.10.19.02.31.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 19 Oct 2024 02:31:21 -0700 (PDT) Message-ID: Date: Sat, 19 Oct 2024 11:31:18 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: x1e80100: Describe TLMM pins for SDC2 To: Abel Vesa , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Johan Hovold , Dmitry Baryshkov , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> <20241014-x1e80100-qcp-sdhc-v2-2-868e70a825e0@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241014-x1e80100-qcp-sdhc-v2-2-868e70a825e0@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 8egJ6aRmkcbyQfpCgVTAUluxxWMKsogg X-Proofpoint-GUID: 8egJ6aRmkcbyQfpCgVTAUluxxWMKsogg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 adultscore=0 spamscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 phishscore=0 clxscore=1015 suspectscore=0 mlxlogscore=999 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410190068 On 14.10.2024 10:19 AM, Abel Vesa wrote: > Describe the SDC2 default and sleep state pins configuration > in TLMM. Do this in SoC dtsi file since they will be shared > across multiple boards. > > Signed-off-by: Abel Vesa > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 40 ++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 2d0befd6ba0ea11fdf2305d23c0cd8743de303dc..dfdae4f9225740bb3d2de6b0054ed60a2397bba9 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -5741,6 +5741,46 @@ rx-pins { > bias-disable; > }; > }; > + > + sdc2_sleep: sdc2-sleep-state { > + clk-pins { > + pins = "sdc2_clk"; > + bias-disable; > + drive-strength = <2>; Other nodes have bias after drive-strength Also unusual to have _sleep before _default The nodes look sane otherwise Konrad