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From: "André Goddard Rosa" <andre.goddard@gmail.com>
To: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: gregkh@suse.de, alan@linux.intel.com,
	Andrew Morton <akpm@linux-foundation.org>,
	adobriyan@gmail.com, linux list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] serial: cascade needless conditionals
Date: Sun, 25 Oct 2009 14:37:57 -0200	[thread overview]
Message-ID: <b8bf37780910250937x14b8f008xd8443fe004749403@mail.gmail.com> (raw)
In-Reply-To: <20091025162019.GA10898@khazad-dum.debian.net>

Hi, Henrique!

On 10/25/09, Henrique de Moraes Holschuh <hmh@hmh.eng.br> wrote:
> On Sun, 25 Oct 2009, André Goddard Rosa wrote:
>>  	if (flags == UPF_SPD_HI)
>>  		altbaud = 57600;
>> -	if (flags == UPF_SPD_VHI)
>> +	else if (flags == UPF_SPD_VHI)
>>  		altbaud = 115200;
>> -	if (flags == UPF_SPD_SHI)
>> +	else if (flags == UPF_SPD_SHI)
>>  		altbaud = 230400;
>> -	if (flags == UPF_SPD_WARP)
>> +	else if (flags == UPF_SPD_WARP)
>>  		altbaud = 460800;
>
> This changes code behaviour if more than one bit is set (which might never
> happen for all I know...).  You should invert the order of the tests if you
> want to make sure it is side-effect-free.
>

Do you mind explaining why? Notice that it's not (var & flag), it's =='.
Can flags be equal more than one flag at the same time?

Thanks,
André

  reply	other threads:[~2009-10-25 16:37 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-10-25 13:18 André Goddard Rosa
2009-10-25 16:20 ` Henrique de Moraes Holschuh
2009-10-25 16:37   ` André Goddard Rosa [this message]
2009-10-25 18:39     ` Henrique de Moraes Holschuh

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