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[2003:d8:2f04:3c00:248f:bf5b:b03e:aac7]) by smtp.gmail.com with ESMTPSA id k6-20020adfd846000000b00314315071bbsm4324550wrl.38.2023.07.07.05.11.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Jul 2023 05:11:12 -0700 (PDT) Message-ID: Date: Fri, 7 Jul 2023 14:11:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [RFC 0/4] arm64/mm: Clean up pte_dirty() state management Content-Language: en-US To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Andrew Morton , Jonathan Corbet , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org References: <20230707053331.510041-1-anshuman.khandual@arm.com> From: David Hildenbrand Organization: Red Hat In-Reply-To: <20230707053331.510041-1-anshuman.khandual@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07.07.23 07:33, Anshuman Khandual wrote: > These pte_dirty() changes make things explicitly clear, while improving the > code readability. This optimizes HW dirty state transfer into SW dirty bit. > This also adds a new arm64 documentation explaining overall pte dirty state > management in detail. This series applies on the latest mainline kernel. > > I skimmed over most of the series, and I am not convinced that this is actually a cleanup. If we cannot really always differentiate between sw/hw clearing, why have separate primitives that give one the illusion that it could be done and that they are two different concepts? Maybe there are other opinions, but at least for me this made the code harder to grasp. I do appreciate a doc update, though :) -- Cheers, David / dhildenb