From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C5502AE99; Thu, 20 Mar 2025 13:20:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742476839; cv=none; b=PJGsuCYdKsc3amsoswGblkk/FvwIEweesrAG7jiTYlLaGPkESgUlSglE4ZpvrojSRAaaBXgt16RCSnKTCJMuQcH/1VdVBdSHca89sZwlYXGp9GA3rfkvkGsSqxj8D4wRJ0x3z2J3refb4pguORqU9GeI6v2GWbaCXcpo65GJF9Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742476839; c=relaxed/simple; bh=s+5inRnnJWyj20LEfi2ebATkXnpn5nPdD5sUgf/YnF0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=chIGCjS/8stNk3/esoYczvHYS9IrGCePIe2/6Bq9vBMu9wtKDqvMP8tqO7+S92egyYh0crX0JSUga+V5+QQJJfOBioDqnyYye4CO4XNpu9slJyMul1nHT0AxnGXxntjplrB3N++u8/xjGe7h9uRwJXCCU3pzUGWyv30GDvqAqNU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=NfN6pSB9; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="NfN6pSB9" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=aRlSKlwPjz5OfI49MqhNhAWG0xXIoHSGK59j5+5+Zr4=; b=NfN6pSB9tndSEmbKrcEDWBQ7VE a3rhcdRX6VShAnN3x/dbyLefD+8TJqkLDiXi5d6YzibV36IF2c6QJjdbn+vRxdiDdMqkzE57BAKxH SFkwOeDkzh09nnY8wLo63xOnVyl95cGmwf0YSSaPHNK8nI2jvVhqMZh7j38ODwYQjyBo=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1tvFot-006TkK-9J; Thu, 20 Mar 2025 14:20:23 +0100 Date: Thu, 20 Mar 2025 14:20:23 +0100 From: Andrew Lunn To: Jonas Karlman Cc: Heiko Stuebner , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Wu , Yao Zi , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH net-next v3 5/5] net: stmmac: dwmac-rk: Add initial support for RK3528 integrated PHY Message-ID: References: <20250319214415.3086027-1-jonas@kwiboo.se> <20250319214415.3086027-6-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250319214415.3086027-6-jonas@kwiboo.se> On Wed, Mar 19, 2025 at 09:44:09PM +0000, Jonas Karlman wrote: > Rockchip RK3528 (and RV1106) has a different integrated PHY compared to > the integrated PHY on RK3228/RK3328. Current powerup/down operation is > not compatible with the integrated PHY found in these newer SoCs. > > Add operations to powerup/down the integrated PHY found in RK3528. > Use helpers that can be used by other GMAC variants in the future. > > Signed-off-by: Jonas Karlman Reviewed-by: Andrew Lunn Andrew