Re: [PATCH v4 RESEND 3/5] perf/x86/lbr: Move cpuc->lbr_xsave allocation out of sleeping region

["Liang, Kan" <kan.liang@linux.intel.com>]

On 3/23/2021 5:41 PM, Peter Zijlstra wrote:
> On Mon, Mar 22, 2021 at 02:06:33PM +0800, Like Xu wrote:
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 18df17129695..a4ce669cc78d 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -373,7 +373,7 @@ set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event *event)
>>   	return x86_pmu_extra_regs(val, event);
>>   }
>>   
>> -int x86_reserve_hardware(void)
>> +int x86_reserve_hardware(struct perf_event *event)
>>   {
>>   	int err = 0;
>>   
>> @@ -382,8 +382,10 @@ int x86_reserve_hardware(void)
>>   		if (atomic_read(&pmc_refcount) == 0) {
>>   			if (!reserve_pmc_hardware())
>>   				err = -EBUSY;
>> -			else
>> +			else {
>>   				reserve_ds_buffers();
>> +				reserve_lbr_buffers(event);
>> +			}
>>   		}
>>   		if (!err)
>>   			atomic_inc(&pmc_refcount);
> 
> This makes absolutely no sense what so ever. This is only executed for
> the first event that gets here.
> 

The LBR xsave buffer is a per-CPU buffer, not a per-event buffer. I 
think we only need to allocate the buffer once when initializing the 
first event.

Thanks,
Kan