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Wed, 21 Jan 2026 04:47:37 -0800 (PST) X-Received: by 2002:a17:902:f548:b0:29f:cb81:8bd1 with SMTP id d9443c01a7336-2a76b2697demr49338235ad.55.1768999657155; Wed, 21 Jan 2026 04:47:37 -0800 (PST) Received: from [10.206.103.12] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a780a4631csm37773775ad.18.2026.01.21.04.47.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Jan 2026 04:47:36 -0800 (PST) Message-ID: Date: Wed, 21 Jan 2026 18:17:31 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] arm64: dts: qcom: SM8750: Enable CPUFreq support To: Konrad Dybcio , Jagadeesh Kona Cc: Ajit Pandey , Imran Shaik , Taniya Das , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sibi Sankar , Jassi Brar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio References: <20251211-sm8750-cpufreq-v1-0-394609e8d624@oss.qualcomm.com> <20251211-sm8750-cpufreq-v1-2-394609e8d624@oss.qualcomm.com> <908b64f1-f6ac-4c5e-9c72-1174cba62017@oss.qualcomm.com> <99796cc0-f29b-40d0-b8bb-ebcbcc950b23@oss.qualcomm.com> <996f47de-5900-4a3a-9372-e5ea3ae31c8b@oss.qualcomm.com> <417f77ba-a0b0-4ba5-824d-8814b776c557@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: <417f77ba-a0b0-4ba5-824d-8814b776c557@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTIxMDEwNyBTYWx0ZWRfXxzqlfHoFaeZz AYZ+C8RMPsA8XBCj+a4tvb4hmAD8dCGpeSXsp65THxdvcke9oeYw7Z9hUQtr1PQR264kITZ8TEV sZXNTAxnrPT1Iob4XNCjGjFGKkUsjaBM0Kyvfg/wammPQTkfKRXj5tQF7uMN28U3LgiEF4TC7Yx fgMW+hrd28w9V9ypA41H16YFrKI4jlRsozYZndrtRZ4QXzY8RDO4H1K0fDVO3f32242YKxT44PN sjXc5qx32b1SKMxtedCoyvmNE5i7ihp6ImiO6ztw1GsyNl8joHsHPWytOtZcPVrfWTkZdFHeX/W gCy1NQgfGc+UGhAi6xKxhZzCVZyUfUtmG2eoJnZaLlyuYS8qTkf1jQKJqmCWvGmwQWK9KkPMPxV 6QDkgbh+cFpZVtrtloZh1MPC7z0yGQdMb3uKbQsk10a36vzosDjNmF/HCQGM4nZgiOYMKXBzAgw RQh0c1i4in8Dr5OQV1Q== X-Authority-Analysis: v=2.4 cv=S5bUAYsP c=1 sm=1 tr=0 ts=6970caea cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=hfhOgts8FtG9wfp3ybAA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-ORIG-GUID: kY0nqaPKPJDkXG1SvmlQmPRiA-pij_Mb X-Proofpoint-GUID: kY0nqaPKPJDkXG1SvmlQmPRiA-pij_Mb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-21_01,2026-01-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601210107 On 1/21/2026 5:06 PM, Konrad Dybcio wrote: > On 1/20/26 9:54 PM, Akhil P Oommen wrote: >> On 1/20/2026 8:13 PM, Konrad Dybcio wrote: >>> On 1/20/26 12:25 PM, Akhil P Oommen wrote: >>>> On 1/20/2026 3:44 PM, Konrad Dybcio wrote: >>>>> On 1/19/26 8:00 PM, Akhil P Oommen wrote: >>>>>> On 12/11/2025 12:32 AM, Jagadeesh Kona wrote: >>>>>>> Add the cpucp mailbox, sram and SCMI nodes required to enable >>>>>>> the CPUFreq support using the SCMI perf protocol on SM8750 SoCs. >>>>>>> >>>>>>> Signed-off-by: Jagadeesh Kona >>>>>> >>>>>> Just curious, does this patch enable thermal mitigation for CPU clusters >>>>>> too? >>>>> >>>>> If nothing changed, we have lets-not-explode type mitigations via LMH, >>>>> but lets-not-burn-the-user would require a skin temp sensor to be >>>>> wired up, which then could be used to enable some cooling action >>>> >>>> In some chipsets, I have noticed that the gpu cooling device throttles >>>> GPU to the lowest OPP even with not-so-heavy GPU workloads, making it >>>> unusable-ly slow. My hypothesis was that it was due to unmitigated CPU >>>> temperature tripping up GPU Tsens. >>>> >>>> So, I am wondering if there are any additional CPU cooling related >>>> changes required to get a reasonable overall performance under thermal >>>> constraints. >>> >>> Yes, something like the aforementioned skin-temp sensor at least.. >> >> I suppose this sensor is off-chip and slow to react. > > Yes, this would be placed somewhere on the chassis of the device to > reflect the actual temperature that the user could experience (since > there are regulations about maximum values of that) > >>> Today Linux will not throttle the CPUs at all (they're not even declared >>> as cooling devices) and we sorta agreed that in general it's a good thing >>> (tm), because otherwise we'd be coding in a cooling profile into the SoC >>> DTSI without taking into account the cooling capabilities of a given end >>> device (i.e. in an extreme case, a PC with SM8650 with a cooler that's >>> 3kg of aluminium vs a Steam Frame headset where the SoC is centimeters >>> away from your face) >>> >>> Currently, we have cooling policies for devices with fans and the only >>> other action is based on a skin temperature sensor (sc8280xp + x13s). >>> Everything else is left up to the LMH defaults. AFAIK work is ongoing to >>> create a more informed solution, that would have to (quite obviously) >>> live in userland. >> >> I can understand that the skin-temp based mitigation is influenced by >> various design decision outside of the SoC die. But I think there should >> an on-chip sensor based mitigation which is fast and usually for a short >> duration which helps to avoid extreme temperature or violating the >> maximum operating point of the chipset. I guess it should depend only on >> the SoC characteristics as it is a last resort. It may be implemented in >> SW (like cooling device for Adreno GPU) or in HW. Probably the LMH >> hardware you mentioned offers this functionality for CPU clusters. I >> have no clue. :( > > Yes, the CPUs are covered. Does this LMH based thermal migitation require any initialization from Linux? If yes, could you please share a link to a patch which enables it for any recent chipset for my reference? -Akhil. > >> I am hoping that if this on-chip mitigation is enabled and wired up >> correctly for CPU clusters (probably DDR too), it would reduce the >> unnecessary thermal trips on GPU Tsens and help to reach a performance >> equilibrium which is reasonably good. > > Today, the OS is unaware that it can throttle anything else than the > GPU, so in its view that's the reasonable step to take. Further, any > device it knows how to throttle, it'll do so in a very jittery fashion > where it crosses the threshold, gets slowed down, cools a bit, gets > unthrottled, heats back up, rinse and repeat (because the cooling > solution of almost any form-factor is not capable of sustaining a > 100%usage workload for long) > > Konrad