From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2714F1F7099; Wed, 4 Dec 2024 16:04:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733328300; cv=none; b=Y4VHPhOkWPDeZTiBowibFGkCqLBg+k1Cn5MJxbalfZMZyalQ6h6NCRvETs1b/jYz4+JrIh+V9VPHqf42z7BopQ49pvxAhot/14SZR/RHxRAJbVW4OgnnWhvLJDhn/R+9Fyz1rjs3v/t1D1wctnTsPOz3nX5i+/tCP2O2v3KfDEc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733328300; c=relaxed/simple; bh=C3PVXGm45ULNAqZE4h9VZWoMGKJEU0y/gIV6rWMrPF0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=gXG3KFBgRVPwL4JlJC8mxaH6dQyZ160yzueM1BBOyW2AntRdS16wYQdBFRN3wfaq+h+UG6sANToBy1J/GRXGxYibE52Wf2eiNUZFgW7/D/GUc/F3aVCK+r8sPKRxZi9DgLh4pyRLUmytoSM1bfl6U/plaIf5r4fdzDcvzffC4YE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=OEdPDLnP; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="OEdPDLnP" Received: from [192.168.88.20] (91-157-155-49.elisa-laajakaista.fi [91.157.155.49]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A99536D6; Wed, 4 Dec 2024 17:04:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1733328267; bh=C3PVXGm45ULNAqZE4h9VZWoMGKJEU0y/gIV6rWMrPF0=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=OEdPDLnPd6N+fxDyZ2Q7P1hZWZ7/63Zy5NrZ8TinHpQDrzvN8ar2Mnxrk2oZvWnpk tdaHeBvj6mHbvHB2dtEnasjKJpxJbzqtuwjy6Az+R01wGakkh55wIrSw3QrVGI+eh9 u7JypWdpJ1mQoBOxmLAtR74XBTP7LJ5mThS5LC0M= Message-ID: Date: Wed, 4 Dec 2024 18:04:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/9] arm64: dts: renesas: r8a779h0: Add display support To: Laurent Pinchart Cc: Kieran Bingham , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd , LUU HOAI , Jagan Teki , Sam Ravnborg , Biju Das , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Tomi Valkeinen References: <20241203-rcar-gh-dsi-v1-0-738ae1a95d2a@ideasonboard.com> <20241203-rcar-gh-dsi-v1-8-738ae1a95d2a@ideasonboard.com> <20241203093703.GL10736@pendragon.ideasonboard.com> Content-Language: en-US From: Tomi Valkeinen Autocrypt: addr=tomi.valkeinen@ideasonboard.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, On 03/12/2024 11:37, Laurent Pinchart wrote: > Hi Tomi, > > Thank you for the patch. > > On Tue, Dec 03, 2024 at 10:01:42AM +0200, Tomi Valkeinen wrote: >> From: Tomi Valkeinen >> >> Add the device nodes for supporting DU and DSI. >> >> Signed-off-by: Tomi Valkeinen >> --- >> arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 77 +++++++++++++++++++++++++++++++ >> 1 file changed, 77 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi >> index 12d8be3fd579..82df6ee98afb 100644 >> --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi >> +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi >> @@ -1828,6 +1828,54 @@ csi41isp1: endpoint { >> }; >> }; >> >> + fcpvd0: fcp@fea10000 { >> + compatible = "renesas,fcpv"; >> + reg = <0 0xfea10000 0 0x200>; >> + clocks = <&cpg CPG_MOD 508>; >> + power-domains = <&sysc R8A779H0_PD_C4>; >> + resets = <&cpg 508>; >> + }; >> + >> + vspd0: vsp@fea20000 { >> + compatible = "renesas,vsp2"; >> + reg = <0 0xfea20000 0 0x8000>; >> + interrupts = ; > > The documentation lists this interrupt as being LevelSensitive and > Negative. I wouldn't expect the VSP to work at all with a wrong polarity > in DT, so the level may get inverted somewhere. Indeed... It's the same for V4H. And it also has IRQ_TYPE_LEVEL_HIGH in the dts. I tried changing it to LOW on V4H, but: genirq: Setting trigger mode 8 for irq 91 failed vsp1 fea20000.vsp: failed to request IRQ I didn't dig further yet. >> + clocks = <&cpg CPG_MOD 830>; >> + power-domains = <&sysc R8A779H0_PD_C4>; >> + resets = <&cpg 830>; >> + renesas,fcp = <&fcpvd0>; >> + }; >> + >> + du: display@feb00000 { >> + compatible = "renesas,du-r8a779h0"; >> + reg = <0 0xfeb00000 0 0x40000>; >> + interrupts = ; >> + clocks = <&cpg CPG_MOD 411>; >> + clock-names = "du.0"; >> + power-domains = <&sysc R8A779H0_PD_C4>; >> + resets = <&cpg 411>; >> + reset-names = "du.0"; >> + renesas,vsps = <&vspd0 0>; >> + >> + status = "disabled"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + du_out_dsi0: endpoint { >> + remote-endpoint = <&dsi0_in>; >> + }; >> + }; >> + >> + port@1 { >> + reg = <1>; >> + }; > > On V4M the DU has a single channel, so there should be a single port. Yep, I'll drop. Tomi > Reviewed-by: Laurent Pinchart > >> + }; >> + }; >> + >> isp0: isp@fed00000 { >> compatible = "renesas,r8a779h0-isp", >> "renesas,rcar-gen4-isp"; >> @@ -1996,6 +2044,35 @@ isp1vin15: endpoint { >> }; >> }; >> >> + dsi0: dsi-encoder@fed80000 { >> + compatible = "renesas,r8a779h0-dsi-csi2-tx"; >> + reg = <0 0xfed80000 0 0x10000>; >> + clocks = <&cpg CPG_MOD 415>, >> + <&cpg CPG_CORE R8A779H0_CLK_DSIEXT>, >> + <&cpg CPG_CORE R8A779H0_CLK_DSIREF>; >> + clock-names = "fck", "dsi", "pll"; >> + power-domains = <&sysc R8A779H0_PD_C4>; >> + resets = <&cpg 415>; >> + >> + status = "disabled"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + dsi0_in: endpoint { >> + remote-endpoint = <&du_out_dsi0>; >> + }; >> + }; >> + >> + port@1 { >> + reg = <1>; >> + }; >> + }; >> + }; >> + >> prr: chipid@fff00044 { >> compatible = "renesas,prr"; >> reg = <0 0xfff00044 0 4>; >