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Wed, 29 Apr 2026 02:15:20 -0700 (PDT) X-Received: by 2002:a17:90b:4cd1:b0:35f:be09:1a2b with SMTP id 98e67ed59e1d1-36491ff1ce0mr7520072a91.10.1777454120422; Wed, 29 Apr 2026 02:15:20 -0700 (PDT) Received: from [10.217.216.225] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-364a419a148sm1650856a91.6.2026.04.29.02.15.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Apr 2026 02:15:20 -0700 (PDT) Message-ID: Date: Wed, 29 Apr 2026 14:45:14 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm64: dts: qcom: sm8750: Add camera clock controller To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa References: <20260225-sm8750_camcc_dt-v3-1-a19d3173a160@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI5MDA5MiBTYWx0ZWRfXz5bAT0MC8KAw 76eXEU6yo9drnLHHoA+vOtdoo/MVWLeJprlYZ3cnLSYN/HCp3XpYLbFUycmePWuh+6FF+DwuiGs fvm0YGDbIbmItlvN+rLm21hsJ7rp/2LJnvaz6KBXj/HcyfBiwQaTMjPiRo2xfOYgzl41GtRO99P 9OQsEw2eonwCdNw7ti3wUswPNWTex3KTOdrlYH7g0PkwAbvalzBGrAWZFu8uOUrPsUq4T4EEKM4 g38rcZITr6vgfAYeI3erNQbuiPfcT/RmfWmOBInu/vwVJ7iMTbhyzqmvb09Ma3YFdSuOrmV8xNO Wr9YBUdUY5qgl/y9EpLIl/gXVSxfsAfKhmPbstGPKHyXOgWKId3MqjpY76rHrTIvx2t66cJVDsa xqmWyiDFRPvxm78XNm6nb3HcE8cLa6D/VwcXXc91xcXVHwnlo8w9TWQ/DAQf9g/bHFDeIQUsaCW C+Bb+ka8iu47wcd1zXA== X-Proofpoint-GUID: tiZTDQalbb3Oc12yFRqRdag5kqocWplZ X-Proofpoint-ORIG-GUID: tiZTDQalbb3Oc12yFRqRdag5kqocWplZ X-Authority-Analysis: v=2.4 cv=CL4amxrD c=1 sm=1 tr=0 ts=69f1cc29 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=WVJonjGCGc2Ee2brpuEA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 clxscore=1015 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290092 On 2/25/2026 7:48 PM, Konrad Dybcio wrote: > On 2/25/26 11:12 AM, Taniya Das wrote: >> The camera clock controller is split into cambistmclk and camcc. The >> cambist clock controller handles the mclks and the rest of the clocks of >> camera are part of the camcc clock controller. >> Add the camcc clock controller device node for SM8750 SoC. >> >> Reviewed-by: Abel Vesa >> Signed-off-by: Taniya Das >> --- > > [...] > >> + cambistmclkcc: clock-controller@1760000 { >> + compatible = "qcom,sm8750-cambistmclkcc"; >> + reg = <0x0 0x1760000 0x0 0x6000>; >> + clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> , > > Stray space before the comma Yes, will fix this in the next patch. > >> + <&bi_tcxo_div2>, >> + <&bi_tcxo_ao_div2>, >> + <&sleep_clk>; >> + power-domains = <&rpmhpd RPMHPD_MMCX>, > > I find it difficult to believe, but the computer tells me CAM_BIST_MCLK_CC > is powered from *CX*, notably *not MMCX*, could you please double-check that > as well? > Sorry for the long delay in response Konrad. Most of the CAM_BIST_MCLK are on MxA, only few debug clocks are in the "CX" domain. But the CAM_BIST_PLL0 fails to lock without MMCX enable. That is the reason to keep the power-domain to MMCX. -- Thanks, Taniya Das