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Thu, 20 Nov 2025 02:04:22 -0800 (PST) Message-ID: Subject: Re: [PATCH v5 1/4] dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Peter Griffin , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Tudor Ambarus , Michael Turquette , Stephen Boyd , Sam Protsenko , Sylwester Nawrocki , Chanwoo Choi Cc: Will McVicker , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, kernel-team@android.com Date: Thu, 20 Nov 2025 10:04:20 +0000 In-Reply-To: <20251114-automatic-clocks-v5-1-efb9202ffcd7@linaro.org> References: <20251114-automatic-clocks-v5-0-efb9202ffcd7@linaro.org> <20251114-automatic-clocks-v5-1-efb9202ffcd7@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-7 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-11-14 at 14:16 +0000, Peter Griffin wrote: > Each CMU (with the exception of cmu_top) has a corresponding sysreg bank > that contains the BUSCOMPONENT_DRCG_EN and optional MEMCLK registers. > The BUSCOMPONENT_DRCG_EN register enables dynamic root clock gating of > bus components and MEMCLK gates the sram clock. >=20 > Now the clock driver supports automatic clock mode, to fully enable dynam= ic > root clock gating it is required to configure these registers. Update the > bindings documentation so that all CMUs (with the exception of > gs101-cmu-top) have samsung,sysreg as a required property. >=20 > Note this is NOT an ABI break, as if the property isn't specified the > clock driver will fallback to the current behaviour of not initializing > the registers. The system still boots, but bus components won't benefit > from dynamic root clock gating and dynamic power will be higher (which ha= s > been the case until now anyway). >=20 > Additionally update the DT example to included the correct CMU size as > registers in that region are used for automatic clock mode. >=20 > Signed-off-by: Peter Griffin > --- > Changes in v5: > - Invert the test for google,gs101-cmu-top (Andre) Reviewed-by: Andr=C3=A9 Draszik