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([2a05:6e02:1041:c10:5dfc:3995:22ce:d286]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48541b6f6e6sm871921055e9.10.2026.03.16.02.32.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Mar 2026 02:32:04 -0700 (PDT) Message-ID: Date: Mon, 16 Mar 2026 10:32:04 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] cpuidle: Deny idle entry when CPU already have IPI interrupt pending To: Christian Loehle , Maulik Shah , "Rafael J. Wysocki" , Daniel Lezcano , Ulf Hansson Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20260316-cpuidle_ipi-v1-1-d0ff6350f4e2@oss.qualcomm.com> <39ffe4f6-5716-400d-963b-06675a727225@arm.com> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <39ffe4f6-5716-400d-963b-06675a727225@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: i8cHD03QJ6XYHvG-acVng9drtVn7hauD X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE2MDA3MyBTYWx0ZWRfXxO8EqPFx9NU5 O4UMFhjg4TNSK7PCenPCZ0PxQAKJzJJGloFcxwIdvFMtCGqCw3j2QeqUuZ4+gCkaebYGisuPGZW QcByJPVpEak77nRQ3xSXGbdyFN5PP3hRYrVYDB0Exs/finmBocGhQdfakJucvTNJG/2xPwrUOQV piP1TwVqlT05EWNItQEJqkrCpOHcfOiB/URgV/0uY/7hvREhcZrl6fgIiJttrGSFAIVGp5wnOuw TigsuksDeV3N3SMDg9wII+TorWkWur5m5wv4vqjpPuV8nMYOegqiiY7qTqrn+EzHSC8CR2wB7Vy Oq0iJMfFJnFP9RAZZ/hL2X/6vW41FwUK2Z8m2p/sIrM0mU1hqzbWGP21a6bFTX2vA5tIAMjdWTm yBUesbdlyOp/41Ei9Pa2zmPcV1t2AcfoEtJj6YdIkxdGU8LCaTwcSCEJiTLYtmYD6sxK0MTXejQ Wqm9waNp69fjZNTD1eg== X-Proofpoint-ORIG-GUID: i8cHD03QJ6XYHvG-acVng9drtVn7hauD X-Authority-Analysis: v=2.4 cv=ZbQQ98VA c=1 sm=1 tr=0 ts=69b7ce16 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=NEAV23lmAAAA:8 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=lggpn7pwzXPsZ0vCzx8A:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-16_03,2026-03-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 adultscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 phishscore=0 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603160073 On 3/16/26 09:55, Christian Loehle wrote: > On 3/16/26 07:37, Maulik Shah wrote: >> CPU can get IPI interrupt from another CPU while it is executing >> cpuidle_select() or about to execute same. The selection do not account >> for pending interrupts and may continue to enter selected idle state only >> to exit immediately. >> >> Example trace collected when there is cross CPU IPI. >> >> [000] 154.892148: sched_waking: comm=sugov:4 pid=491 prio=-1 target_cpu=007 >> [000] 154.892148: ipi_raise: target_mask=00000000,00000080 (Function call interrupts) >> [007] 154.892162: cpu_idle: state=2 cpu_id=7 >> [007] 154.892208: cpu_idle: state=4294967295 cpu_id=7 >> [007] 154.892211: irq_handler_entry: irq=2 name=IPI >> [007] 154.892211: ipi_entry: (Function call interrupts) >> [007] 154.892213: sched_wakeup: comm=sugov:4 pid=491 prio=-1 target_cpu=007 >> [007] 154.892214: ipi_exit: (Function call interrupts) >> >> This impacts performance and the above count increments. >> >> commit ccde6525183c ("smp: Introduce a helper function to check for pending >> IPIs") already introduced a helper function to check the pending IPIs and >> it is used in pmdomain governor to deny the cluster level idle state when >> there is a pending IPI on any of cluster CPUs. >> >> This however does not stop CPU to enter CPU level idle state. Make use of >> same at CPUidle to deny the idle entry when there is already IPI pending. >> >> With change observing glmark2 [1] off screen scores improving in the range >> of 25% to 30% on Qualcomm lemans-evk board which is arm64 based having two >> clusters each with 4 CPUs. >> >> [1] https://github.com/glmark2/glmark2 >> >> Signed-off-by: Maulik Shah >> --- >> drivers/cpuidle/cpuidle.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c >> index c7876e9e024f9076663063ad21cfc69343fdbbe7..c88c0cbf910d6c2c09697e6a3ac78c081868c2ad 100644 >> --- a/drivers/cpuidle/cpuidle.c >> +++ b/drivers/cpuidle/cpuidle.c >> @@ -224,6 +224,9 @@ noinstr int cpuidle_enter_state(struct cpuidle_device *dev, >> bool broadcast = !!(target_state->flags & CPUIDLE_FLAG_TIMER_STOP); >> ktime_t time_start, time_end; >> >> + if (cpus_peek_for_pending_ipi(drv->cpumask)) >> + return -EBUSY; >> + >> instrumentation_begin(); >> >> /* >> >> --- >> base-commit: b84a0ebe421ca56995ff78b66307667b62b3a900 >> change-id: 20260316-cpuidle_ipi-4c64036f9a48 >> >> Best regards, > > So we already do a per-CPU IPI need_resched() check in the idle path. The need_resched() is not the same check. Here the interrupts are off, the test check if there is a pending IPI before entering the sleep routine which will in any case abort because of it. This check saves the costs related to preparing entering the idle state, the call to the firmware and the rollback. Those add an overhead in terms of latency and energy for nothing. As stated in the description, this ultimate check before going idle was introduced also for the cluster idle state and showed a significant improvement [1]. [1] https://lore.kernel.org/all/20251105095415.17269-1-ulf.hansson@linaro.org/ > Your patch uses drv->cpumask, which will contain all CPUs, preventing idle entry if > any CPU has an IPI pending?