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([2a05:6e02:1041:c10:37e6:ed62:3c8b:2621]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-4324ea830f3sm56716550f8f.22.2025.12.28.09.37.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 28 Dec 2025 09:37:23 -0800 (PST) Message-ID: Date: Sun, 28 Dec 2025 18:37:22 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/3] counter: Add STM based counter To: William Breathitt Gray Cc: robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, s32@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org References: <20251217075000.2592966-4-daniel.lezcano@linaro.org> <20251228065241.21144-1-wbg@kernel.org> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <20251228065241.21144-1-wbg@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi William, On 12/28/25 07:52, William Breathitt Gray wrote: > On Wed, Dec 17, 2025 at 08:49:57AM +0100, Daniel Lezcano wrote: >> The NXP S32G2 automotive platform integrates four Cortex-A53 cores and >> three Cortex-M7 cores, along with a large number of timers and >> counters. These hardware blocks can be used as clocksources or >> clockevents, or as timestamp counters shared across the various >> subsystems running alongside the Linux kernel, such as firmware >> components. Their actual usage depends on the overall platform >> software design. >> >> In a Linux-based system, the kernel controls the counter, which is a >> read-only shared resource for the other subsystems. One of its primary >> purposes is to act as a common timestamp source for messages or >> traces, allowing correlation of events occurring in different >> operating system contexts. >> >> These changes introduce a basic counter driver that can start, stop, >> and reset the counter. It also handles overflow accounting and >> configures the prescaler value. >> >> Signed-off-by: Daniel Lezcano > > Hi Daniel, > > It sounds like you're trying to implement a clock for timestamping. Well no, it is a counter which is used for timestamping. It is an automotive design. > Although the Generic Counter interface is flexible enough to shoehorn a > a clock into its representation, I don't believe it's the right > abstraction for this particular device. > > Perhaps reimplementing this > driver under the Linux common clock framework would be a better approach > to achieve what you want. The common clock framework ? Sorry I may have misunderstood the CCF but how a counter exported and controlled by the userspace can be managed by the CCF. Can you elaborate ? > Regardless, if you do pursue a Counter driver you'll need to follow the > Generic Counter paradigm[^1] and define at least three core components: > a Signal, a Synapse, and a Count. Resetting the Count is typically > implemented by defining a struct counter_ops counter_write() > callback[^2], while overflows are typically implemented by pushing > COUNTER_EVENT_OVERFLOW Counter events[^3] that can be watched by > userspace. Yes, I think the Generic counter makes sense here for the goal to be achieved. Thanks for the pointers, I'll see how the counter fits with the paradigm. -- Daniel > William Breathitt Gray > > [^1] https://docs.kernel.org/driver-api/generic-counter.html#paradigm > [^2] https://docs.kernel.org/driver-api/generic-counter.html#c.counter_ops > [^3] https://docs.kernel.org/driver-api/generic-counter.html#counter-events -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog