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Thu, 5 Feb 2026 11:46:48 -0600 Message-ID: Date: Thu, 5 Feb 2026 23:16:47 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 01/12] spi: dt-bindings: add spi-has-dqs property To: Miquel Raynal CC: , , , , , , , , , , , , , , , , , References: <20260113141617.1905039-1-s-k6@ti.com> <20260113141617.1905039-2-s-k6@ti.com> <87wm0sg50q.fsf@bootlin.com> Content-Language: en-US From: Santhosh Kumar K In-Reply-To: <87wm0sg50q.fsf@bootlin.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001505:EE_|BL3PR10MB6091:EE_ X-MS-Office365-Filtering-Correlation-Id: 615a2bbb-70e6-4271-9325-08de64de8e7a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|36860700013|82310400026; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: eRV6ajFUZByQC2y3sBKzMG7VVTNmh4DF8yAaa6lflRAM8hzEc9Doors2NuEDNT5DvWcem5TQ2J8Gu7MkHSn7X299dQa1i3RAZNQo5iDyZ6Y/FB/11AJTA4NhdY9zPeg0D18VFrIsCiUwpk3rivSX9WA8uR7494jGDRUtsw+XYP1UUKV5xtSRZUghuGz+WFztrrba0rQOVppGrqjk7L3QkmDyWF7mhZEmWLRz74m47r5Xe+nXizsVDNge11BaLu/R+v8xm0wr95KRh//+3tL3QIFRCZYfb/7Tmc7kEIBaztUIPVaYlz3XHAqyhhKDEsEuo0oOwltyRTQGelwVLj10d6u+XMASyZzSEZ+riFmxGj20id8KIhkMqxxflIa2i4SejK/t9z5yFtbs31r4q7WMJF7eI7oYBy0/1IS1JbNLQxlImZ4s8nBKtu9TRKj/8RB4 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2026 17:46:56.8343 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 615a2bbb-70e6-4271-9325-08de64de8e7a X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.195];Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001505.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR10MB6091 Hello Miquel, On 04/02/26 16:16, Miquel Raynal wrote: > On 13/01/2026 at 19:46:06 +0530, Santhosh Kumar K wrote: > >> Add the optional 'spi-has-dqs' boolean property for SPI flash device >> subnodes. This property indicates the flash device supports DQS (Data >> Strobe) mode, which provides improved timing margins for data capture >> in high-speed SPI operations. >> >> Signed-off-by: Santhosh Kumar K >> --- >> .../devicetree/bindings/spi/spi-peripheral-props.yaml | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml >> index 8b6e8fc009db..c6f330fd32aa 100644 >> --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml >> +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml >> @@ -89,6 +89,12 @@ properties: >> description: >> Delay, in microseconds, after a write transfer. >> >> + spi-has-dqs: >> + description: >> + Indicates the SPI flash device supports DQS (Data Strobe) mode for >> + improved data capture timing. >> + $ref: /schemas/types.yaml#/definitions/flag > > This information is currently lacking indeed, mostly because nobody ever > cared about it. The DT property is IMO not the correct way to give this > information for two reasons: > - this is a capability of the chip, we discover the chip dynamically in > both cases (NAND and NOR) and attach many capabilities to the chips > already, so I believe this information should be provided through a > flag. > - the fact that the DQS signal might be supported does not indicate it > is actually driven. Winbond chips, for instance, can either enable it > or not depending on their configuration (probably through their VCR > register, I need to check again). I agree. The flash device's capability to provide DQS - whether in SDR, DDR or both modes - can be represented as a flag in the flash description. We can list out the possible combinations and use them to clearly describe the flash's supported capabilities. However, whether the DQS signal is actually connected to the controller is a non-discoverable hardware detail and should be described only via Device Tree. The DT property is not meant to describe the flash's capabilities, but to indicate whether DQS is physically connected to the controller. > > The question I have is: shall we enable the DQS pin automatically if it > is available? Not all controllers support it I suppose, and wiring the > line might as well not be done (or incorrectly). For these cases we may > need DT properties in the future. But for the DQS presence indication, I > bet it is not useful, and should be handled at the core level (not > parsed by the driver like you do) because it may have an impact on the > chip internal configuration. We can handle this in either way: keep DQS disabled by default and enable it using a "has-dqs" property, or enable it by default and disable it explicitly using a "no-dqs" property. Thanks, Santhosh. > > I will try to come up with a proposal soon! > > Cheers, > Miquèl