From: Aradhya Bhatia <a-bhatia1@ti.com>
To: Maxime Ripard <mripard@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Jyri Sarha <jyri.sarha@iki.fi>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
DRI Development List <dri-devel@lists.freedesktop.org>,
Linux Kernel List <linux-kernel@vger.kernel.org>,
Sam Ravnborg <sam@ravnborg.org>,
Thierry Reding <treding@nvidia.com>,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Praneeth Bajjuri <praneeth@ti.com>, Udit Kumar <u-kumar1@ti.com>,
Devarsh Thakkar <devarsht@ti.com>,
Jayesh Choudhary <j-choudhary@ti.com>,
Jai Luthra <j-luthra@ti.com>
Subject: Re: [PATCH 6/7] drm/bridge: Introduce early_enable and late disable
Date: Thu, 16 May 2024 15:10:15 +0530 [thread overview]
Message-ID: <ba8d0b98-67d2-41e2-b568-a40543a9b0fa@ti.com> (raw)
In-Reply-To: <20240516-bipedal-keen-taipan-eedbe7@penduick>
Hi Maxime,
Thank you for reviewing the patches!
On 16/05/24 13:52, Maxime Ripard wrote:
> On Sat, May 11, 2024 at 09:00:50PM +0530, Aradhya Bhatia wrote:
>> diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h
>> index 4baca0d9107b..40f93230abb2 100644
>> --- a/include/drm/drm_bridge.h
>> +++ b/include/drm/drm_bridge.h
>> @@ -206,6 +206,20 @@ struct drm_bridge_funcs {
>> */
>> void (*post_disable)(struct drm_bridge *bridge);
>>
>> + /**
>> + * @late_disable:
>> + *
>> + * This callback should disable the bridge. It is called right after the
>> + * preceding element in the display pipe is disabled. If the preceding
>> + * element is a bridge this means it's called after that bridge's
>> + * @atomic_post_disable. If the preceding element is a &drm_crtc it's
>> + * called right after the crtc's &drm_crtc_helper_funcs.atomic_disable
>> + * hook.
>> + *
>> + * The @late_disable callback is optional.
>> + */
>> + void (*late_disable)(struct drm_bridge *bridge);
>> +
>> /**
>> * @mode_set:
>> *
>> @@ -235,6 +249,26 @@ struct drm_bridge_funcs {
>> void (*mode_set)(struct drm_bridge *bridge,
>> const struct drm_display_mode *mode,
>> const struct drm_display_mode *adjusted_mode);
>> +
>> + /**
>> + * @early_enable:
>> + *
>> + * This callback should enable the bridge. It is called right before
>> + * the preceding element in the display pipe is enabled. If the
>> + * preceding element is a bridge this means it's called before that
>> + * bridge's @early_enable. If the preceding element is a &drm_crtc it's
>> + * called right before the crtc's &drm_crtc_helper_funcs.atomic_enable
>> + * hook.
>> + *
>> + * The display pipe (i.e. clocks and timing signals) feeding this bridge
>> + * will not yet be running when this callback is called. The bridge can
>> + * enable the display link feeding the next bridge in the chain (if
>> + * there is one) when this callback is called.
>> + *
>> + * The @early_enable callback is optional.
>> + */
>> + void (*early_enable)(struct drm_bridge *bridge);
>> +
>
> You don't need the legacy option here, just go straight for the atomic one.
Got it! I can remove these in v2.
>
>> /**
>> * @pre_enable:
>> *
>> @@ -285,6 +319,26 @@ struct drm_bridge_funcs {
>> */
>> void (*enable)(struct drm_bridge *bridge);
>>
>> + /**
>> + * @atomic_early_enable:
>> + *
>> + * This callback should enable the bridge. It is called right before
>> + * the preceding element in the display pipe is enabled. If the
>> + * preceding element is a bridge this means it's called before that
>> + * bridge's @atomic_early_enable. If the preceding element is a
>> + * &drm_crtc it's called right before the crtc's
>> + * &drm_crtc_helper_funcs.atomic_enable hook.
>> + *
>> + * The display pipe (i.e. clocks and timing signals) feeding this bridge
>> + * will not yet be running when this callback is called. The bridge can
>> + * enable the display link feeding the next bridge in the chain (if
>> + * there is one) when this callback is called.
>> + *
>> + * The @early_enable callback is optional.
>> + */
>> + void (*atomic_early_enable)(struct drm_bridge *bridge,
>> + struct drm_bridge_state *old_bridge_state);
>> +
>> /**
>> * @atomic_pre_enable:
>> *
>> @@ -361,6 +415,21 @@ struct drm_bridge_funcs {
>> void (*atomic_post_disable)(struct drm_bridge *bridge,
>> struct drm_bridge_state *old_bridge_state);
>>
>> + /**
>> + * @atomic_late_disable:
>> + *
>> + * This callback should disable the bridge. It is called right after the
>> + * preceding element in the display pipe is disabled. If the preceding
>> + * element is a bridge this means it's called after that bridge's
>> + * @atomic_late_disable. If the preceding element is a &drm_crtc it's
>> + * called right after the crtc's &drm_crtc_helper_funcs.atomic_disable
>> + * hook.
>> + *
>> + * The @atomic_late_disable callback is optional.
>> + */
>> + void (*atomic_late_disable)(struct drm_bridge *bridge,
>> + struct drm_bridge_state *old_bridge_state);
>> +
>
> But more importantly, I don't quite get the use case you're trying to
> solve here.
>
> If I got the rest of your series, the Cadence DSI bridge needs to be
> powered up before its source is started. You can't use atomic_enable or
> atomic_pre_enable because it would start the source before the DSI
> bridge. Is that correct?
>
That's right. I cannot use bridge_atomic_pre_enable /
bridge_atomic_enable here. But that's because my source is CRTC, which
gets enabled via crtc_atomic_enable.
> If it is, then how is it different from what
> drm_atomic_bridge_chain_pre_enable is doing? The assumption there is
> that it starts enabling bridges last to first, to it should be enabled
> before anything starts.
>
> The whole bridge enabling order code starts to be a bit of a mess, so it
> would be great if you could list all the order variations we have
> currently, and why none work for cdns-dsi.
>
Of course! I can elaborate on the order.
Without my patches (and given there isn't any bridge setting the
"pre_enable_prev_first" flag) the order of enable for any single display
chain, looks like this -
crtc_enable
bridge[n]_pre_enable
---
bridge[1]_pre_enable
encoder_enable
bridge[1]_enable
---
bridge[n]_enable
The tidss enables at the crtc_enable level, and hence is the first
entity with stream on. cdns-dsi doesn't stand a chance with
bridge_atmoic_pre_enable / bridge_atmoic_enable hooks. And there is no
bridge call happening before crtc currently.
That's where the early_enable APIs come into picture. They are being
called before the crtc is even enabled, helping cdns-dsi to be enabled
before tidss. The order then looks like -
bridge[1]_early_enable
---
bridge[n]_early_enable
crtc_enable
---
(the order is same from here on)
Regards
Aradhya
next prev parent reply other threads:[~2024-05-16 9:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-11 15:30 [PATCH 0/7] drm/bridge: cdns-dsi: Fix the color-shift issue Aradhya Bhatia
2024-05-11 15:30 ` [PATCH 1/7] drm/tidss: Add CRTC mode_fixup Aradhya Bhatia
2024-05-16 8:10 ` Maxime Ripard
2024-05-16 11:03 ` Aradhya Bhatia
2024-05-21 13:18 ` Maxime Ripard
2024-05-30 9:39 ` Aradhya Bhatia
2024-05-11 15:30 ` [PATCH 2/7] drm/bridge: cdns-dsi: Fix minor bugs Aradhya Bhatia
2024-05-16 8:11 ` Maxime Ripard
2024-05-16 9:41 ` Aradhya Bhatia
2024-05-11 15:30 ` [PATCH 3/7] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready Aradhya Bhatia
2024-05-22 10:23 ` [EXTERNAL] " Dominik Haller
2024-05-11 15:30 ` [PATCH 4/7] drm/bridge: cdns-dsi: Reset the DCS write FIFO Aradhya Bhatia
2024-05-11 15:30 ` [PATCH 5/7] drm/bridge: cdns-dsi: Support atomic bridge APIs Aradhya Bhatia
2024-05-21 20:20 ` Markus Elfring
2024-05-11 15:30 ` [PATCH 6/7] drm/bridge: Introduce early_enable and late disable Aradhya Bhatia
2024-05-16 8:22 ` Maxime Ripard
2024-05-16 9:40 ` Aradhya Bhatia [this message]
2024-05-21 13:15 ` Maxime Ripard
2024-05-24 11:08 ` Aradhya Bhatia
2024-05-28 11:43 ` Maxime Ripard
2024-05-30 9:43 ` Aradhya Bhatia
2024-05-11 15:30 ` [PATCH 7/7] drm/bridge: cdns-dsi: Implement early_enable and late_disable Aradhya Bhatia
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ba8d0b98-67d2-41e2-b568-a40543a9b0fa@ti.com \
--to=a-bhatia1@ti.com \
--cc=Laurent.pinchart@ideasonboard.com \
--cc=airlied@gmail.com \
--cc=andrzej.hajda@intel.com \
--cc=boris.brezillon@bootlin.com \
--cc=daniel@ffwll.ch \
--cc=devarsht@ti.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=j-choudhary@ti.com \
--cc=j-luthra@ti.com \
--cc=jernej.skrabec@gmail.com \
--cc=jonas@kwiboo.se \
--cc=jyri.sarha@iki.fi \
--cc=kieran.bingham+renesas@ideasonboard.com \
--cc=linux-kernel@vger.kernel.org \
--cc=maarten.lankhorst@linux.intel.com \
--cc=mripard@kernel.org \
--cc=neil.armstrong@linaro.org \
--cc=nm@ti.com \
--cc=praneeth@ti.com \
--cc=rfoss@kernel.org \
--cc=sam@ravnborg.org \
--cc=tomi.valkeinen@ideasonboard.com \
--cc=treding@nvidia.com \
--cc=tzimmermann@suse.de \
--cc=u-kumar1@ti.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®