From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5318948166A for ; Thu, 4 Jun 2026 16:21:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780590099; cv=none; b=VUOe/RdhP8ELyQ75tk4oMcOmcFajIEzRUd3JLSpD+KQ24FBKtldnw1kQ64Y+2dGFEVHxHqVB/zr690+4mEg60nWTCA79bKaSgJZi5RIPqixL/LrKlskBBScjw6Mga5QNVm7D91CAptCWrkMydrFbGyJ3qCSldHvmlaSIQihc6H4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780590099; c=relaxed/simple; bh=/HumKetlzkB9HHj961ARwdPZRob+ggQZ3vBdy9m1LWI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=goSc9EU4Ja5bgALiVKkeWMY464Br+txFzc15FefTRavOe54KnPVoZpcIiXYR9pyzEyUzv/nWquAb0RoXKvyDGF2PEn7UsyHANb/vSUtPNEw3hNzzH5kKdb2uCbytUjwJCyqBfhjiX1DSiQvfLE+aLztah+dwz6B09HszpO9e8jQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=oHAQZuwb; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="oHAQZuwb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780590098; x=1812126098; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/HumKetlzkB9HHj961ARwdPZRob+ggQZ3vBdy9m1LWI=; b=oHAQZuwbuDgqvm9ysTHlyDyo+4oGk7KpYZwqr4zNVwL12lT86SsOlsCX g+XgHbHiOpfH//vRQHjKolFpr+cSXHXQ4u4hcgetTZFJ3fU6MANvxn1Xf ZDzoUn4aHR6RIryq63CYFsBCdn7Rkd5vKnJI71upkEDSLotn8y8oWKZOZ FE9XOumKef9KzQF/zZnz7WsZvmZXLyDpa92mjPCMXyW9nw5JjajI/BZU9 n2IVTF9ggVnZt3bFjirFlnfq/Bg8Pj8Y/MVj+OdZXfh5OP2r0INl6p8AD 4NCyBECzZT/OokfmpJc4nPmYsNCxb/X3ZjB9OaBTk7kV1t4rfTzRVGmRb A==; X-CSE-ConnectionGUID: J92kPx2uT5u5aS7MjMzu1A== X-CSE-MsgGUID: GVBw9oaxSBaDWLk9p94/xw== X-IronPort-AV: E=McAfee;i="6800,10657,11807"; a="92529148" X-IronPort-AV: E=Sophos;i="6.24,187,1774335600"; d="scan'208";a="92529148" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2026 09:21:38 -0700 X-CSE-ConnectionGUID: yIE7WbiVS3Sas9jkdxEjUQ== X-CSE-MsgGUID: V2bRjQ0LQgCTswmMIOYuIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,187,1774335600"; d="scan'208";a="248521180" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by orviesa003.jf.intel.com with ESMTP; 04 Jun 2026 09:21:34 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de, tglx@kernel.org, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, dave.martin@arm.com, james.morse@arm.com, fenghuay@nvidia.com, babu.moger@amd.com, anil.keshavamurthy@broadcom.com Subject: [PATCH v2 5/6] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Date: Fri, 5 Jun 2026 00:11:45 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Tony Luck __l3_mon_event_count() and __l3_mon_event_count_sum() call smp_processor_id() to obtain the current CPU. However, some monitor events can be read from any CPU in task context via mon_event_count(); in that case the calling context is preemptible and smp_processor_id() triggers a debug warning. Fix this by skipping the current-CPU lookup when the event's any_cpu flag is set, since such events do not need to run on a specific CPU. Signed-off-by: Tony Luck Signed-off-by: Chen Yu --- fs/resctrl/monitor.c | 38 ++++++++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 9fd901c78dc6..371ccae04892 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -417,9 +417,33 @@ static void mbm_cntr_free(struct rdt_l3_mon_domain *d, int cntr_id) memset(&d->cntr_cfg[cntr_id], 0, sizeof(*d->cntr_cfg)); } +/* + * Called from preemptible context via a direct call of mon_event_count() for + * events that can be read on any CPU. + * Called from preemptible but non-migratable process context (mon_event_count() + * via smp_call_on_cpu()) OR non-preemptible context (mon_event_count() via + * smp_call_function_any()) for events that need to be read on a specific CPU. + */ +static bool cpu_on_correct_domain(struct rmid_read *rr) +{ + int cpu; + + /* Any CPU is OK for this event */ + if (rr->evt->any_cpu) + return true; + + cpu = smp_processor_id(); + + /* Single domain. Must be on a CPU in that domain. */ + if (rr->hdr) + return cpumask_test_cpu(cpu, &rr->hdr->cpu_mask); + + /* Summing domains that share a cache, must be on a CPU for that cache. */ + return cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map); +} + static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) { - int cpu = smp_processor_id(); u32 closid = rdtgrp->closid; u32 rmid = rdtgrp->mon.rmid; struct rdt_l3_mon_domain *d; @@ -452,9 +476,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) return 0; } - /* Reading a single domain, must be on a CPU in that domain. */ - if (!cpumask_test_cpu(cpu, &d->hdr.cpu_mask)) - return -EINVAL; if (rr->is_mbm_cntr) rr->err = resctrl_arch_cntr_read(rr->r, d, closid, rmid, cntr_id, rr->evt->evtid, &tval); @@ -472,7 +493,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *rr) { - int cpu = smp_processor_id(); u32 closid = rdtgrp->closid; u32 rmid = rdtgrp->mon.rmid; struct rdt_l3_mon_domain *d; @@ -490,10 +510,6 @@ static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *r return -EINVAL; } - /* Summing domains that share a cache, must be on a CPU for that cache. */ - if (!cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map)) - return -EINVAL; - /* * Legacy files must report the sum of an event across all * domains that share the same L3 cache instance. @@ -524,7 +540,9 @@ static int __mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr) { switch (rr->r->rid) { case RDT_RESOURCE_L3: - WARN_ON_ONCE(rr->evt->any_cpu); + if (!cpu_on_correct_domain(rr)) + return -EINVAL; + if (rr->hdr) return __l3_mon_event_count(rdtgrp, rr); else -- 2.25.1