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d=adamthiede.com; s=MBO0001; t=1782134631; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:autocrypt:autocrypt; bh=r5BOb3xnTK4eCWEtOyNU5XqC+C6LY0tRD894bJlWhQg=; b=h3KwdA3hvsyvxanjpl/ZT5xq08MITHBEPxw4Flwx/Iin/wEhqKFTfatuaOehizfPU6QIPF ggXqTPltOkioToTXMVnash+tvnMvyNpnR93whhrnPzaNxF/eHFH+LTfaEd6xD9FHeOo+3M r38W8eYl9bsq7peZYof/fY+nKaNZGO8nWIa22jqtAZ/3sXmaoZjAnzvHgBF3IWMWrsx2no xpLe5RLavSehpmbrSJHDzTu6MA7MFdzwPdATO+LsXYU+Ry6/nT1rmLoJc4FmVgNnVKC9jh ELFMD15AoICH3xuLpO4Jh1yDrBfnHknu9fvyPyapSu1FQuCxLhmcZTB13B//SQ== Message-ID: Date: Mon, 22 Jun 2026 08:23:43 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH] drm/mediatek: mtk_dsi: enable hs clock during pre-enable To: Gary Bisson Cc: Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Matthias Brugger , AngeloGioacchino Del Regno , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20260120-mtkdsi-v1-1-b0f4094f3ac3@gmail.com> <42607fa4-485d-4142-b31c-7bfac71118d2@adamthiede.com> Content-Language: en-US From: Adam Thiede Autocrypt: addr=me@adamthiede.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/22/26 06:22, Gary Bisson wrote: > Hi, > > On Thu, Jun 18, 2026 at 04:06:28PM -0500, Adam Thiede wrote: >> On 1/20/26 05:36, Gary Bisson wrote: >>> Some bridges, such as the TI SN65DSI83, require the HS clock to be >>> running in order to lock its PLL during its own pre-enable function. >>> >>> Without this change, the bridge gives the following error: >>> sn65dsi83 14-002c: failed to lock PLL, ret=-110 >>> sn65dsi83 14-002c: Unexpected link status 0x01 >>> sn65dsi83 14-002c: reset the pipe >>> >>> Move the necessary functions from enable to pre-enable. >>> >>> Signed-off-by: Gary Bisson >>> --- >>> Tested on Tungsten510 module with sn65dsi83 + tm070jdhg30 panel. >>> >>> Left mtk_dsi_set_mode() as part of the enable function to mimic what is >>> done in the Samsung DSIM driver which is known to be working the TI >>> bridge. >>> --- >>> drivers/gpu/drm/mediatek/mtk_dsi.c | 35 +++++++++++++++++------------------ >>> 1 file changed, 17 insertions(+), 18 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c >>> index 0e2bcd5f67b7..b560245d1be9 100644 >>> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c >>> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c >>> @@ -672,6 +672,21 @@ static s32 mtk_dsi_switch_to_cmd_mode(struct mtk_dsi *dsi, u8 irq_flag, u32 t) >>> } >>> } >>> +static void mtk_dsi_lane_ready(struct mtk_dsi *dsi) >>> +{ >>> + if (!dsi->lanes_ready) { >>> + dsi->lanes_ready = true; >>> + mtk_dsi_rxtx_control(dsi); >>> + usleep_range(30, 100); >>> + mtk_dsi_reset_dphy(dsi); >>> + mtk_dsi_clk_ulp_mode_leave(dsi); >>> + mtk_dsi_lane0_ulp_mode_leave(dsi); >>> + mtk_dsi_clk_hs_mode(dsi, 0); >>> + usleep_range(1000, 3000); >>> + /* The reaction time after pulling up the mipi signal for dsi_rx */ >>> + } >>> +} >>> + >>> static int mtk_dsi_poweron(struct mtk_dsi *dsi) >>> { >>> struct device *dev = dsi->host.dev; >>> @@ -724,6 +739,8 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) >>> mtk_dsi_set_vm_cmd(dsi); >>> mtk_dsi_config_vdo_timing(dsi); >>> mtk_dsi_set_interrupt_enable(dsi); >>> + mtk_dsi_lane_ready(dsi); >>> + mtk_dsi_clk_hs_mode(dsi, 1); >>> return 0; >>> err_disable_engine_clk: >>> @@ -769,30 +786,12 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) >>> dsi->lanes_ready = false; >>> } >>> -static void mtk_dsi_lane_ready(struct mtk_dsi *dsi) >>> -{ >>> - if (!dsi->lanes_ready) { >>> - dsi->lanes_ready = true; >>> - mtk_dsi_rxtx_control(dsi); >>> - usleep_range(30, 100); >>> - mtk_dsi_reset_dphy(dsi); >>> - mtk_dsi_clk_ulp_mode_leave(dsi); >>> - mtk_dsi_lane0_ulp_mode_leave(dsi); >>> - mtk_dsi_clk_hs_mode(dsi, 0); >>> - usleep_range(1000, 3000); >>> - /* The reaction time after pulling up the mipi signal for dsi_rx */ >>> - } >>> -} >>> - >>> static void mtk_output_dsi_enable(struct mtk_dsi *dsi) >>> { >>> if (dsi->enabled) >>> return; >>> - mtk_dsi_lane_ready(dsi); >>> mtk_dsi_set_mode(dsi); >>> - mtk_dsi_clk_hs_mode(dsi, 1); >>> - >>> mtk_dsi_start(dsi); >>> dsi->enabled = true; >>> >>> --- >>> base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8 >>> change-id: 20260120-mtkdsi-29e4c84e7b38 >>> >>> Best regards, >> >> Hello, >> This commit was part of 7.1 and caused a problem for me. >> I'm running postmarketOS (basically Alpine Linux) on a Lenovo C330 >> chromebook with a Mediatek MT8173 processor. >> The problem: when the display on my laptop powers off (via suspend or idle, >> like xset dpms off) the picture does not come back when the display powers >> back on (from resume). The display backlight comes on and brightness is >> adjustable but there is no picture. The only fix is to reboot. >> >> Reverting this commit and applying it as a patch on top of 7.1 addresses the >> issue for me. >> >> You can view the config I'm using here: >> https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/8819 >> >> Is there any sort of testing or other debugging info I can provide to help >> address this issue? > > Thanks for reporting the issue, could you share some logs? Is the driver > saying anything during resume? Also, what type of panel is used on that > chromebook? > > Thanks, > Gary The curious thing is that there are no real logs in dmesg or /var/log/messages about this. This picture just fails to come back. If there are some kernel params I can set to get deeper logging, that would help, but I'm not aware of any. I think the panel is a "BOE NV116WHM-T00" - I used this command to get info: cat /sys/class/drm/card0-eDP-1/edid | edid-decode Output: https://termbin.com/8nbd