From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757906AbeAINiL (ORCPT + 1 other); Tue, 9 Jan 2018 08:38:11 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:53544 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752615AbeAINiJ (ORCPT ); Tue, 9 Jan 2018 08:38:09 -0500 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Tue, 09 Jan 2018 14:37:50 +0100 From: Stefan Agner To: Lucas Stach Cc: Anson Huang , Dong Aisheng , mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, dl-linux-imx , kernel@pengutronix.de, Fabio Estevam , shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/7] ARM: imx: add timer stop flag to ARM power off state In-Reply-To: <1515492803.12538.29.camel@pengutronix.de> References: <20180102164223.15230-1-stefan@agner.ch> <20180109092232.GA26312@b29396-OptiPlex-7040> <1515492803.12538.29.camel@pengutronix.de> Message-ID: User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 2018-01-09 11:13, Lucas Stach wrote: > Am Dienstag, den 09.01.2018, 09:25 +0000 schrieb Anson Huang: >> >> Best Regards! >> Anson Huang >> >> >> > -----Original Message----- >> > From: Dong Aisheng [mailto:dongas86@gmail.com] >> > Sent: 2018-01-09 5:23 PM >> > To: Stefan Agner >> > Cc: shawnguo@kernel.org; kernel@pengutronix.de; Fabio Estevam >> > ; robh+dt@kernel.org; mark.rutland@arm.com; >> > linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; >> > linux- >> > kernel@vger.kernel.org; Anson Huang ; dl- >> > linux-imx >> > >> > Subject: Re: [PATCH 1/7] ARM: imx: add timer stop flag to ARM power >> > off state >> > >> > On Tue, Jan 02, 2018 at 05:42:17PM +0100, Stefan Agner wrote: >> > > When the CPU is in ARM power off state the ARM architected timers >> > > are >> > > stopped. The flag is already present in the higher power WAIT >> > > mode. >> > > >> > > This allows to use the ARM generic timer on i.MX 6UL/6ULL SoC. >> > > Without the flag the kernel freezes when the timer enters the >> > > first >> > > time ARM power off mode. >> > > >> > > Cc: Anson Huang >> > > Signed-off-by: Stefan Agner >> > >> > It seems ok at my side. >> > Did you meet the real issue? If yes, how to reproduce? >> > >> > Both mx6sx and mx6ul are using GPT which do not need that flag, >> > suppose we >> > should remove it, right? >> > Anson can help confirm it. >> >> For UP system like i.MX6SX, we do NOT enable "cortex-a9-twd-timer", >> so local >> timer is NOT used, GPT is used instead, GPT's clock is NOT disabled >> when cpuidle, >> so I think we should remove all these Timer stop flag for 6SX >> CPUIDLE. > > It's correct to set the flag even on UP systems, as the flag means the > CPU _local_ timer is stopped in this sleep mode. Also there are systems > out there which are using the TWD on UP, as it operates at a higher > frequency leading to better wakeup granularity. Documentation/devicetree/bindings/arm/twd.txt states that TWD provides "per-cpu local timer". But as far as I can see TWD still uses SPI interrupts, routed through GIC, so is this the differentiation? -- Stefan